From: lkcl <lkcl@web>
Date: Fri, 21 Apr 2023 14:09:06 +0000 (+0100)
Subject: (no commit message)
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=0b408210f61995871d0adb8efaa9082a21c8955d;p=libreriscv.git

---

diff --git a/openpower/sv/rfc/ls011.mdwn b/openpower/sv/rfc/ls011.mdwn
index 5dc568f3a..516b012d4 100644
--- a/openpower/sv/rfc/ls011.mdwn
+++ b/openpower/sv/rfc/ls011.mdwn
@@ -83,6 +83,11 @@ stfsupsx,   ls011, med, 10, yes, EXT2xx, no, ls011, 3R1W
 
 # Example
 
+Here is an annotated example where the pseudo-code changes to
+just use `RA` as the address, otherwise remaining the same.
+No actual change to the Effective Address computation itself
+occurs, in any of the Post-Update instructions.
+
 ** Load Byte and Zero with Post-Update**
 
 D-Form
@@ -92,9 +97,9 @@ D-Form
 Pseudo-code:
 
 ```
-    EA <- (RA)
-    RT <- ([0] * (XLEN-8)) || MEM(EA, 1)
-    RA <- (RA) + EXTS(D)
+    EA <- (RA)                           # EA just RA
+    RT <- ([0] * (XLEN-8)) || MEM(EA, 1) # then load
+    RA <- (RA) + EXTS(D)                 # then update RA after
 ```
 
 Special Registers Altered:
@@ -106,9 +111,9 @@ Special Registers Altered:
 where the same pseudocode for `lbzu` is:
 
 ```
-    EA <- (RA) + EXTS(D)
-    RT <- ([0] * (XLEN-8)) || MEM(EA, 1)
-    RA <- EA
+    EA <- (RA) + EXTS(D)                  # EA includes D
+    RT <- ([0] * (XLEN-8)) || MEM(EA, 1)  # load from RA+D
+    RA <- EA                              # and update RA 
 ```
 
 [[!tag opf_rfc]]