From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Tue, 3 Mar 2020 18:41:35 +0000 (+0000)
Subject: experimenting getting power decoder into shape
X-Git-Tag: div_pipeline~1792
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=0b47e3e305d3813b8bffcecac0e81cc2bff23df1;p=soc.git

experimenting getting power decoder into shape
---

diff --git a/src/decoder/power_decoder.py b/src/decoder/power_decoder.py
index 148e1c37..39c7976d 100644
--- a/src/decoder/power_decoder.py
+++ b/src/decoder/power_decoder.py
@@ -83,7 +83,7 @@ class PowerDecoder(Elaboratable):
 
         self.op = PowerOp()
         self.suffix = suffix
-        if suffix[1] - suffix[0] >= width:
+        if suffix is not None and suffix[1] - suffix[0] >= width:
             self.suffix = None
         self.width = width
 
@@ -93,9 +93,10 @@ class PowerDecoder(Elaboratable):
     def divide_opcodes(self):
         divided = {}
         mask = self.suffix_mask()
+        print ("mask", hex(mask))
         for row in self.opcodes:
             opcode = row['opcode']
-            if self.opint:
+            if self.opint and '-' not in opcode:
                 opcode = int(opcode, 0)
             key = opcode & mask >> (self.suffix[0])
             opcode = opcode >> self.suffix[1]
@@ -129,7 +130,7 @@ class PowerDecoder(Elaboratable):
             with m.Switch(self.opcode_in):
                 for row in self.opcodes:
                     opcode = row['opcode']
-                    if self.opint:
+                    if self.opint and '-' not in opcode:
                         opcode = int(opcode, 0)
                     if not row['unit']:
                         continue
diff --git a/src/decoder/test/test_power_decoder.py b/src/decoder/test/test_power_decoder.py
index c0a82863..925fd10e 100644
--- a/src/decoder/test/test_power_decoder.py
+++ b/src/decoder/test/test_power_decoder.py
@@ -80,6 +80,8 @@ class DecoderTestCase(FHDLTestCase):
 
     def generate_ilang(self, width, csvname, opint=True, suffix=None):
         prefix = os.path.splitext(csvname)[0]
+        if suffix:
+            prefix += ".%s" % str(suffix).replace(" ", "")[1:-1]
         dut = PowerDecoder(width, get_csv(csvname), opint, suffix=suffix)
         vl = rtlil.convert(dut, ports=dut.ports())
         with open("%s_decoder.il" % prefix, "w") as f:
@@ -89,9 +91,9 @@ class DecoderTestCase(FHDLTestCase):
         self.run_test(6, "major.csv")
         self.generate_ilang(6, "major.csv")
 
-    # def test_minor_19(self):
-    #     self.run_test(3, "minor_19.csv")
-    #     self.generate_ilang(3, "minor_19.csv")
+    #def test_minor_19(self):
+    #    self.run_test(10, "minor_19.csv", suffix=(0, 5))
+    #    self.generate_ilang(10, "minor_19.csv", suffix=(0, 5))
 
     def test_minor_30(self):
         self.run_test(4, "minor_30.csv")
@@ -100,10 +102,15 @@ class DecoderTestCase(FHDLTestCase):
     def test_minor_31(self):
         self.run_test(10, "minor_31.csv", suffix=(0, 5))
         self.generate_ilang(10, "minor_31.csv", suffix=(0, 5))
+        assert False
+
+    #def test_minor_31_prefix(self):
+    #    self.run_test(10, "minor_31.csv", suffix=(5, 10))
+    #    self.generate_ilang(10, "minor_31.csv", suffix=(5, 10))
 
     def test_extra(self):
-        self.run_test(32, "extra.csv", False)
-        self.generate_ilang(32, "extra.csv", False)
+        self.run_test(32, "extra.csv", opint=False)
+        self.generate_ilang(32, "extra.csv", opint=False)
 
 
 if __name__ == "__main__":