From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Sun, 8 Mar 2020 15:25:59 +0000 (+0000)
Subject: whitespace
X-Git-Tag: div_pipeline~1757
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=0b58daece208e5ce9fda589398af06231e23c026;p=soc.git

whitespace
---

diff --git a/src/decoder/power_decoder2.py b/src/decoder/power_decoder2.py
index b703e832..34ac6683 100644
--- a/src/decoder/power_decoder2.py
+++ b/src/decoder/power_decoder2.py
@@ -158,7 +158,7 @@ class DecodeOut(Elaboratable):
             with m.Case(In1Sel.RA):
                 comb += self.reg_out.eq(self.dec.RA)
                 comb += self.regok_out.eq(1)
-              with m.Case(In1Sel.SPR):
+            with m.Case(In1Sel.SPR):
                 self.spr_out.eq(self.dec.SPR) # decode SPR field from XFX insn
                 self.sprok_out.eq(1)
 
@@ -185,7 +185,7 @@ class DecodeRC(Elaboratable):
             with m.Case(RC.ONE):
                 comb += self.rc_out.eq(1)
                 comb += self.rcok_out.eq(1)
-              with m.Case(RC.NONE):
+            with m.Case(RC.NONE):
                 comb += self.rc_out.eq(0)
                 comb += self.rcok_out.eq(1)