From: lkcl <lkcl@web>
Date: Sat, 26 Dec 2020 23:26:31 +0000 (+0000)
Subject: (no commit message)
X-Git-Tag: convert-csv-opcode-to-binary~816
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=0b5a7f4be22e96c1e79a20b1533efc29947515ff;p=libreriscv.git

---

diff --git a/openpower/sv/svp64.mdwn b/openpower/sv/svp64.mdwn
index 8dd8db614..a76257921 100644
--- a/openpower/sv/svp64.mdwn
+++ b/openpower/sv/svp64.mdwn
@@ -45,7 +45,7 @@ A number of features need to be compacted into a very small space:
 * Two different *types* of predication: INT and CR
 * SV Modes including saturation (for A/V DSP), mapreduce, fail-first and more.
 
-This document focusses specifically on how that fits into available space.  Rhe [[svp64/appendix]] explains more of the details, whilst the [[sv/overview]] gives the basics.
+This document focusses specifically on how that fits into available space.  The [[svp64/appendix]] explains more of the details, whilst the [[sv/overview]] gives the basics.
 
 # Definition of Reserved in this spec.