From: klehman <klehman9@comcast.net>
Date: Thu, 28 Oct 2021 02:53:08 +0000 (-0400)
Subject: state.py: Fix expected dump for cr regs
X-Git-Tag: sv_maxu_works-initial~771
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=0b7eb1cc2b6f1b820a54e668724f1e00967e85f3;p=openpower-isa.git

state.py: Fix expected dump for cr regs
---

diff --git a/src/openpower/test/state.py b/src/openpower/test/state.py
index d932ed38..735d1925 100644
--- a/src/openpower/test/state.py
+++ b/src/openpower/test/state.py
@@ -236,10 +236,11 @@ class ExpectedState(State):
                     msg = "%se.intregs[%d] = 0x%x\n"
                     sout.write( msg % (lindent, i, reg))
             # cr
-            for i, reg in enumerate(state.crregs):
-                if(reg != 0):
+            for i in range(8):
+                cri = state.crregs[7 - i]
+                if(cri != 0):
                     msg = "%se.crregs[%d] = 0x%x\n"
-                    sout.write( msg % (lindent, i, reg))
+                    sout.write( msg % (lindent, i, cri))
             # XER
             if(state.so != 0):
                 sout.write("%se.so = 0x%x\n" % (lindent, state.so))