From: Chia-I Wu <olvaffe@gmail.com>
Date: Tue, 27 Jan 2015 08:34:45 +0000 (+0800)
Subject: ilo: update ilo_zs_surface for Gen8
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=0b7fdce4f5f507bac86211a6e5356c86e15d8379;p=mesa.git

ilo: update ilo_zs_surface for Gen8
---

diff --git a/src/gallium/drivers/ilo/ilo_builder_3d_bottom.h b/src/gallium/drivers/ilo/ilo_builder_3d_bottom.h
index 14360af681a..a8e8d554dd1 100644
--- a/src/gallium/drivers/ilo/ilo_builder_3d_bottom.h
+++ b/src/gallium/drivers/ilo/ilo_builder_3d_bottom.h
@@ -1082,26 +1082,40 @@ gen6_3DSTATE_DEPTH_BUFFER(struct ilo_builder *builder,
    const uint32_t cmd = (ilo_dev_gen(builder->dev) >= ILO_GEN(7)) ?
       GEN7_RENDER_CMD(3D, 3DSTATE_DEPTH_BUFFER) :
       GEN6_RENDER_CMD(3D, 3DSTATE_DEPTH_BUFFER);
-   const uint8_t cmd_len = 7;
+   const uint8_t cmd_len = (ilo_dev_gen(builder->dev) >= ILO_GEN(8)) ? 8 : 7;
    uint32_t *dw;
    unsigned pos;
 
-   ILO_DEV_ASSERT(builder->dev, 6, 7.5);
+   ILO_DEV_ASSERT(builder->dev, 6, 8);
 
    pos = ilo_builder_batch_pointer(builder, cmd_len, &dw);
 
    dw[0] = cmd | (cmd_len - 2);
    dw[1] = zs->payload[0];
-   dw[3] = (aligned_8x4) ? zs->dw_aligned_8x4 : zs->payload[2];
-   dw[4] = zs->payload[3];
-   dw[5] = zs->payload[4];
-   dw[6] = zs->payload[5];
-
-   if (zs->bo) {
-      ilo_builder_batch_reloc(builder, pos + 2,
-            zs->bo, zs->payload[1], INTEL_RELOC_WRITE);
+   dw[2] = 0;
+
+   /* see ilo_gpe_init_zs_surface() */
+   if (ilo_dev_gen(builder->dev) >= ILO_GEN(8)) {
+      dw[3] = 0;
+      dw[4] = (aligned_8x4) ? zs->dw_aligned_8x4 : zs->payload[2];
+      dw[5] = zs->payload[3];
+      dw[6] = zs->payload[4];
+      dw[7] = zs->payload[5];
+
+      if (zs->bo) {
+         ilo_builder_batch_reloc64(builder, pos + 2, zs->bo,
+               zs->payload[1], INTEL_RELOC_WRITE);
+      }
    } else {
-      dw[2] = 0;
+      dw[3] = (aligned_8x4) ? zs->dw_aligned_8x4 : zs->payload[2];
+      dw[4] = zs->payload[3];
+      dw[5] = zs->payload[4];
+      dw[6] = zs->payload[5];
+
+      if (zs->bo) {
+         ilo_builder_batch_reloc(builder, pos + 2, zs->bo,
+               zs->payload[1], INTEL_RELOC_WRITE);
+      }
    }
 }
 
@@ -1112,23 +1126,32 @@ gen6_3DSTATE_STENCIL_BUFFER(struct ilo_builder *builder,
    const uint32_t cmd = (ilo_dev_gen(builder->dev) >= ILO_GEN(7)) ?
       GEN7_RENDER_CMD(3D, 3DSTATE_STENCIL_BUFFER) :
       GEN6_RENDER_CMD(3D, 3DSTATE_STENCIL_BUFFER);
-   const uint8_t cmd_len = 3;
+   const uint8_t cmd_len = (ilo_dev_gen(builder->dev) >= ILO_GEN(8)) ? 5 : 3;
    uint32_t *dw;
    unsigned pos;
 
-   ILO_DEV_ASSERT(builder->dev, 6, 7.5);
+   ILO_DEV_ASSERT(builder->dev, 6, 8);
 
    pos = ilo_builder_batch_pointer(builder, cmd_len, &dw);
 
    dw[0] = cmd | (cmd_len - 2);
    /* see ilo_gpe_init_zs_surface() */
    dw[1] = zs->payload[6];
+   dw[2] = 0;
 
-   if (zs->separate_s8_bo) {
-      ilo_builder_batch_reloc(builder, pos + 2,
-            zs->separate_s8_bo, zs->payload[7], INTEL_RELOC_WRITE);
+   if (ilo_dev_gen(builder->dev) >= ILO_GEN(8)) {
+      dw[3] = 0;
+      dw[4] = zs->payload[8];
+
+      if (zs->separate_s8_bo) {
+         ilo_builder_batch_reloc64(builder, pos + 2,
+               zs->separate_s8_bo, zs->payload[7], INTEL_RELOC_WRITE);
+      }
    } else {
-      dw[2] = 0;
+      if (zs->separate_s8_bo) {
+         ilo_builder_batch_reloc(builder, pos + 2,
+               zs->separate_s8_bo, zs->payload[7], INTEL_RELOC_WRITE);
+      }
    }
 }
 
@@ -1139,23 +1162,32 @@ gen6_3DSTATE_HIER_DEPTH_BUFFER(struct ilo_builder *builder,
    const uint32_t cmd = (ilo_dev_gen(builder->dev) >= ILO_GEN(7)) ?
       GEN7_RENDER_CMD(3D, 3DSTATE_HIER_DEPTH_BUFFER) :
       GEN6_RENDER_CMD(3D, 3DSTATE_HIER_DEPTH_BUFFER);
-   const uint8_t cmd_len = 3;
+   const uint8_t cmd_len = (ilo_dev_gen(builder->dev) >= ILO_GEN(8)) ? 5 : 3;
    uint32_t *dw;
    unsigned pos;
 
-   ILO_DEV_ASSERT(builder->dev, 6, 7.5);
+   ILO_DEV_ASSERT(builder->dev, 6, 8);
 
    pos = ilo_builder_batch_pointer(builder, cmd_len, &dw);
 
    dw[0] = cmd | (cmd_len - 2);
    /* see ilo_gpe_init_zs_surface() */
-   dw[1] = zs->payload[8];
+   dw[1] = zs->payload[9];
+   dw[2] = 0;
+
+   if (ilo_dev_gen(builder->dev) >= ILO_GEN(8)) {
+      dw[3] = 0;
+      dw[4] = zs->payload[11];
 
-   if (zs->hiz_bo) {
-      ilo_builder_batch_reloc(builder, pos + 2,
-            zs->hiz_bo, zs->payload[9], INTEL_RELOC_WRITE);
+      if (zs->hiz_bo) {
+         ilo_builder_batch_reloc64(builder, pos + 2,
+               zs->hiz_bo, zs->payload[10], INTEL_RELOC_WRITE);
+      }
    } else {
-      dw[2] = 0;
+      if (zs->hiz_bo) {
+         ilo_builder_batch_reloc(builder, pos + 2,
+               zs->hiz_bo, zs->payload[10], INTEL_RELOC_WRITE);
+      }
    }
 }
 
diff --git a/src/gallium/drivers/ilo/ilo_layout.c b/src/gallium/drivers/ilo/ilo_layout.c
index 2de7bd276c7..73db7969bdb 100644
--- a/src/gallium/drivers/ilo/ilo_layout.c
+++ b/src/gallium/drivers/ilo/ilo_layout.c
@@ -1086,6 +1086,8 @@ layout_calculate_hiz_size(struct ilo_layout *layout,
          hz_height = hz_qpitch * templ->array_size / 2;
          if (ilo_dev_gen(params->dev) >= ILO_GEN(7))
             hz_height = align(hz_height, 8);
+
+         layout->aux_layer_height = hz_qpitch;
       }
       break;
    case ILO_LAYOUT_WALK_3D:
diff --git a/src/gallium/drivers/ilo/ilo_layout.h b/src/gallium/drivers/ilo/ilo_layout.h
index 3b6677b58c7..9aa2ae90b75 100644
--- a/src/gallium/drivers/ilo/ilo_layout.h
+++ b/src/gallium/drivers/ilo/ilo_layout.h
@@ -118,6 +118,7 @@ struct ilo_layout {
    /* bitmask of levels that can use aux */
    unsigned aux_enables;
    unsigned aux_offsets[PIPE_MAX_TEXTURE_LEVELS];
+   unsigned aux_layer_height;
    unsigned aux_stride;
    unsigned aux_height;
 };
diff --git a/src/gallium/drivers/ilo/ilo_state.h b/src/gallium/drivers/ilo/ilo_state.h
index 88c72775b54..01555954203 100644
--- a/src/gallium/drivers/ilo/ilo_state.h
+++ b/src/gallium/drivers/ilo/ilo_state.h
@@ -344,7 +344,7 @@ struct ilo_surface_cso {
    union {
       struct ilo_view_surface rt;
       struct ilo_zs_surface {
-         uint32_t payload[10];
+         uint32_t payload[12];
          uint32_t dw_aligned_8x4;
 
          struct intel_bo *bo;
diff --git a/src/gallium/drivers/ilo/ilo_state_3d_bottom.c b/src/gallium/drivers/ilo/ilo_state_3d_bottom.c
index 5ad88de2b75..e6d72fe4af4 100644
--- a/src/gallium/drivers/ilo/ilo_state_3d_bottom.c
+++ b/src/gallium/drivers/ilo/ilo_state_3d_bottom.c
@@ -909,6 +909,7 @@ struct ilo_zs_surface_info {
    struct {
       struct intel_bo *bo;
       unsigned stride;
+      unsigned qpitch;
       enum intel_tiling_mode tiling;
       uint32_t offset;
    } zs, stencil, hiz;
@@ -921,7 +922,7 @@ static void
 zs_init_info_null(const struct ilo_dev_info *dev,
                   struct ilo_zs_surface_info *info)
 {
-   ILO_DEV_ASSERT(dev, 6, 7.5);
+   ILO_DEV_ASSERT(dev, 6, 8);
 
    memset(info, 0, sizeof(*info));
 
@@ -942,7 +943,7 @@ zs_init_info(const struct ilo_dev_info *dev,
 {
    bool separate_stencil;
 
-   ILO_DEV_ASSERT(dev, 6, 7.5);
+   ILO_DEV_ASSERT(dev, 6, 8);
 
    memset(info, 0, sizeof(*info));
 
@@ -1032,6 +1033,10 @@ zs_init_info(const struct ilo_dev_info *dev,
    if (format != PIPE_FORMAT_S8_UINT) {
       info->zs.bo = tex->bo;
       info->zs.stride = tex->layout.bo_stride;
+
+      assert(tex->layout.layer_height % 4 == 0);
+      info->zs.qpitch = tex->layout.layer_height / 4;
+
       info->zs.tiling = tex->layout.tiling;
       info->zs.offset = 0;
    }
@@ -1053,6 +1058,9 @@ zs_init_info(const struct ilo_dev_info *dev,
        */
       info->stencil.stride = s8_tex->layout.bo_stride * 2;
 
+      assert(s8_tex->layout.layer_height % 4 == 0);
+      info->stencil.qpitch = s8_tex->layout.layer_height / 4;
+
       info->stencil.tiling = s8_tex->layout.tiling;
 
       if (ilo_dev_gen(dev) == ILO_GEN(6)) {
@@ -1070,6 +1078,10 @@ zs_init_info(const struct ilo_dev_info *dev,
    if (ilo_texture_can_enable_hiz(tex, level, first_layer, num_layers)) {
       info->hiz.bo = tex->aux_bo;
       info->hiz.stride = tex->layout.aux_stride;
+
+      assert(tex->layout.aux_layer_height % 4 == 0);
+      info->hiz.qpitch = tex->layout.aux_layer_height / 4;
+
       info->hiz.tiling = INTEL_TILING_Y;
 
       /* offset to the level */
@@ -1100,7 +1112,7 @@ ilo_gpe_init_zs_surface(const struct ilo_dev_info *dev,
    uint32_t dw1, dw2, dw3, dw4, dw5, dw6;
    int align_w = 8, align_h = 4;
 
-   ILO_DEV_ASSERT(dev, 6, 7.5);
+   ILO_DEV_ASSERT(dev, 6, 8);
 
    if (tex) {
       zs_init_info(dev, tex, format, level, first_layer, num_layers, &info);
@@ -1158,8 +1170,8 @@ ilo_gpe_init_zs_surface(const struct ilo_dev_info *dev,
       break;
    }
 
-   dw1 = info.surface_type << 29 |
-         info.format << 18;
+   dw1 = info.surface_type << GEN6_DEPTH_DW1_TYPE__SHIFT |
+         info.format << GEN6_DEPTH_DW1_FORMAT__SHIFT;
 
    if (info.zs.bo) {
       /* required for GEN6+ */
@@ -1170,66 +1182,68 @@ ilo_gpe_init_zs_surface(const struct ilo_dev_info *dev,
 
       dw1 |= (info.zs.stride - 1);
       dw2 = info.zs.offset;
-   }
-   else {
+   } else {
       dw2 = 0;
    }
 
    if (ilo_dev_gen(dev) >= ILO_GEN(7)) {
       if (info.zs.bo)
-         dw1 |= 1 << 28;
+         dw1 |= GEN7_DEPTH_DW1_DEPTH_WRITE_ENABLE;
 
       if (info.stencil.bo)
-         dw1 |= 1 << 27;
+         dw1 |= GEN7_DEPTH_DW1_STENCIL_WRITE_ENABLE;
 
       if (info.hiz.bo)
-         dw1 |= 1 << 22;
+         dw1 |= GEN7_DEPTH_DW1_HIZ_ENABLE;
 
-      dw3 = (info.height - 1) << 18 |
-            (info.width - 1) << 4 |
-            info.lod;
+      dw3 = (info.height - 1) << GEN7_DEPTH_DW3_HEIGHT__SHIFT |
+            (info.width - 1) << GEN7_DEPTH_DW3_WIDTH__SHIFT |
+            info.lod << GEN7_DEPTH_DW3_LOD__SHIFT;
 
-      zs->dw_aligned_8x4 = (align(info.height, align_h) - 1) << 18 |
-                           (align(info.width, align_w) - 1) << 4 |
-                           info.lod;
+      zs->dw_aligned_8x4 =
+         (align(info.height, align_h) - 1) << GEN7_DEPTH_DW3_HEIGHT__SHIFT |
+         (align(info.width, align_w) - 1) << GEN7_DEPTH_DW3_WIDTH__SHIFT |
+         info.lod << GEN7_DEPTH_DW3_LOD__SHIFT;
 
-      dw4 = (info.depth - 1) << 21 |
-            info.first_layer << 10;
+      dw4 = (info.depth - 1) << GEN7_DEPTH_DW4_DEPTH__SHIFT |
+            info.first_layer << GEN7_DEPTH_DW4_MIN_ARRAY_ELEMENT__SHIFT;
 
       dw5 = 0;
 
-      dw6 = (info.num_layers - 1) << 21;
-   }
-   else {
+      dw6 = (info.num_layers - 1) << GEN7_DEPTH_DW6_RT_VIEW_EXTENT__SHIFT;
+
+      if (ilo_dev_gen(dev) >= ILO_GEN(8))
+         dw6 |= info.zs.qpitch;
+   } else {
       /* always Y-tiled */
-      dw1 |= 1 << 27 |
-             1 << 26;
+      dw1 |= GEN6_TILING_Y << GEN6_DEPTH_DW1_TILING__SHIFT;
 
       if (info.hiz.bo) {
-         dw1 |= 1 << 22 |
-                1 << 21;
+         dw1 |= GEN6_DEPTH_DW1_HIZ_ENABLE |
+                GEN6_DEPTH_DW1_SEPARATE_STENCIL;
       }
 
-      dw3 = (info.height - 1) << 19 |
-            (info.width - 1) << 6 |
-            info.lod << 2 |
+      dw3 = (info.height - 1) << GEN6_DEPTH_DW3_HEIGHT__SHIFT |
+            (info.width - 1) << GEN6_DEPTH_DW3_WIDTH__SHIFT |
+            info.lod << GEN6_DEPTH_DW3_LOD__SHIFT |
             GEN6_DEPTH_DW3_MIPLAYOUT_BELOW;
 
-      zs->dw_aligned_8x4 = (align(info.height, align_h) - 1) << 19 |
-                           (align(info.width, align_w) - 1) << 6 |
-                           info.lod << 2 |
-                           GEN6_DEPTH_DW3_MIPLAYOUT_BELOW;
+      zs->dw_aligned_8x4 =
+         (align(info.height, align_h) - 1) << GEN6_DEPTH_DW3_HEIGHT__SHIFT |
+         (align(info.width, align_w) - 1) << GEN6_DEPTH_DW3_WIDTH__SHIFT |
+         info.lod << GEN6_DEPTH_DW3_LOD__SHIFT |
+         GEN6_DEPTH_DW3_MIPLAYOUT_BELOW;
 
-      dw4 = (info.depth - 1) << 21 |
-            info.first_layer << 10 |
-            (info.num_layers - 1) << 1;
+      dw4 = (info.depth - 1) << GEN6_DEPTH_DW4_DEPTH__SHIFT |
+            info.first_layer << GEN6_DEPTH_DW4_MIN_ARRAY_ELEMENT__SHIFT |
+            (info.num_layers - 1) << GEN6_DEPTH_DW4_RT_VIEW_EXTENT__SHIFT;
 
       dw5 = 0;
 
       dw6 = 0;
    }
 
-   STATIC_ASSERT(Elements(zs->payload) >= 10);
+   STATIC_ASSERT(Elements(zs->payload) >= 12);
 
    zs->payload[0] = dw1;
    zs->payload[1] = dw2;
@@ -1246,34 +1260,40 @@ ilo_gpe_init_zs_surface(const struct ilo_dev_info *dev,
       assert(info.stencil.stride > 0 && info.stencil.stride < 128 * 1024 &&
              info.stencil.stride % 128 == 0);
 
-      zs->payload[6] = info.stencil.stride - 1;
-      zs->payload[7] = info.stencil.offset;
-
+      dw1 = (info.stencil.stride - 1) << GEN6_STENCIL_DW1_PITCH__SHIFT;
       if (ilo_dev_gen(dev) >= ILO_GEN(7.5))
-         zs->payload[6] |= GEN75_STENCIL_DW1_STENCIL_BUFFER_ENABLE;
+         dw1 |= GEN75_STENCIL_DW1_STENCIL_BUFFER_ENABLE;
 
-      /* do not increment reference count */
-      zs->separate_s8_bo = info.stencil.bo;
-   }
-   else {
-      zs->payload[6] = 0;
-      zs->payload[7] = 0;
-      zs->separate_s8_bo = NULL;
+      dw2 = info.stencil.offset;
+      dw4 = info.stencil.qpitch;
+   } else {
+      dw1 = 0;
+      dw2 = 0;
+      dw4 = 0;
    }
 
+   zs->payload[6] = dw1;
+   zs->payload[7] = dw2;
+   zs->payload[8] = dw4;
+   /* do not increment reference count */
+   zs->separate_s8_bo = info.stencil.bo;
+
    /* hiz */
    if (info.hiz.bo) {
-      zs->payload[8] = info.hiz.stride - 1;
-      zs->payload[9] = info.hiz.offset;
-
-      /* do not increment reference count */
-      zs->hiz_bo = info.hiz.bo;
-   }
-   else {
-      zs->payload[8] = 0;
-      zs->payload[9] = 0;
-      zs->hiz_bo = NULL;
+      dw1 = (info.hiz.stride - 1) << GEN6_HIZ_DW1_PITCH__SHIFT;
+      dw2 = info.hiz.offset;
+      dw4 = info.hiz.qpitch;
+   } else {
+      dw1 = 0;
+      dw2 = 0;
+      dw4 = 0;
    }
+
+   zs->payload[9] = dw1;
+   zs->payload[10] = dw2;
+   zs->payload[11] = dw4;
+   /* do not increment reference count */
+   zs->hiz_bo = info.hiz.bo;
 }
 
 static void