From: lkcl <lkcl@web>
Date: Fri, 22 Dec 2023 14:21:13 +0000 (+0000)
Subject: (no commit message)
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=0b934a4d48dab8620e414f1b19d6e2351712011c;p=libreriscv.git

---

diff --git a/openpower/sv/remap.mdwn b/openpower/sv/remap.mdwn
index 46a614af6..82192a22b 100644
--- a/openpower/sv/remap.mdwn
+++ b/openpower/sv/remap.mdwn
@@ -259,22 +259,24 @@ disabled: the register's elements are a linear (1D) vector.
 
 |0:5   |6:11  | 12:17   | 18:20   | 21:23   |24:27 |28:29  |30:31| Mode  |
 |----- |----- | ------- | ------- | ------  |------|------ |---- | ----- |
-|xdimsz|ydimsz| zdimsz  | permute | invxyz  |offset|skip   |mode |Matrix |
+|xdimsz|ydimsz| zdimsz  | permute | invxyz  |offset|skip   |0b00 |Matrix |
 |xdimsz|ydimsz|SVGPR    | 11/     |sk1/invxy|offset|elwidth|0b00 |Indexed|
 |xdimsz|mode  | zdimsz  | submode2| invxyz  |offset|submode|0b01 |DCT/FFT|
 | rsvd |rsvd  |xdimsz   | rsvd    | invxyz  |offset|submode|0b10 |Red/Sum|
 |      |      |         |         |         |      |       |0b11 |rsvd   |
 
-`mode` sets different behaviours (straight matrix multiply, FFT, DCT).
+`mode` (combined with `permute` when `mode=0b00`) sets different
+general behaviours: straight matrix multiply, FFT, DCT, Reduction or Prefix-Sum.
 
-* **mode=0b00** sets straight Matrix Mode
-* **mode=0b00** with permute=0b110 or 0b111 sets Indexed Mode
+* **mode=0b00** with `permute != 0b110/0b111` sets straight Matrix Mode
+* **mode=0b00** with `permute = 0b110/0b111` sets Indexed Mode
 * **mode=0b01** sets "FFT/DCT" mode and activates submodes
 * **mode=0b10** sets "Parallel Reduction or Prefix-Sum" Schedules.
 
 *Architectural Resource Allocation note: the four SVSHAPE SPRs are best
 allocated sequentially and contiguously in order that `sv.mtspr` may
-be used. This is safe to do as long as `SVSTATE.SVme=0`*
+be used to manipulate (save/restore) them.
+This is safe to do directly as long as `SVSTATE.SVme=0`*
 
 ## Parallel Reduction / Prefix-Sum Mode