From: lkcl <lkcl@web>
Date: Fri, 24 Jun 2022 18:35:19 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~1536
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=0b9b074d607529c3eb041d2bb3fc4c78d035b72a;p=libreriscv.git

---

diff --git a/openpower/sv/remap.mdwn b/openpower/sv/remap.mdwn
index 48b844a1d..322cfc871 100644
--- a/openpower/sv/remap.mdwn
+++ b/openpower/sv/remap.mdwn
@@ -158,7 +158,7 @@ SVSHAPE is actively applied or not.
 * bit 4 of SVme indicates if mo1 is applied to Effective Address / FRS / RS
   (LD/ST-with-update has an implicit 2nd write register, RA)
 
-# svremap instruction
+# svremap instruction <a name="svremap"> </a>
 
 There is also a corresponding SVRM-Form for the svremap
 instruction which matches the above SPR:
@@ -176,7 +176,7 @@ which have the same format.
 
 [[!inline raw="yes" pages="openpower/sv/shape_table_format" ]]
 
-# svshape instruction
+# svshape instruction  <a name="svshape"> </a>
 
 `svshape` is a convenience instruction that reduces instruction
 count for common usage patterns, particularly Matrix, DCT and FFT. It sets up
@@ -236,7 +236,7 @@ to SVSHAPE0-3 with `mtspr`. Circumstances include Matrices with dimensions
 larger than 32, and in-place Transpose.  Potentially a future v3.1 Prefixed
 instruction, `psvshape`, may extend the capability here.
 
-# svindex instruction
+# svindex instruction  <a name="svindex"> </a>
 
 `svindex` is a convenience instruction that reduces instruction
 count for Indexed REMAP Mode. It sets up