From: Claire Wolf <claire@symbioticeda.com>
Date: Tue, 9 Jun 2020 19:49:43 +0000 (+0200)
Subject: Drive-by modernization in sat.cc
X-Git-Tag: working-ls180~483^2~1
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=0bd70e8222c9a95352dd880df1099e3185793004;p=yosys.git

Drive-by modernization in sat.cc

Signed-off-by: Claire Wolf <claire@symbioticeda.com>
---

diff --git a/passes/sat/sat.cc b/passes/sat/sat.cc
index 6acdbc800..e2fe5b846 100644
--- a/passes/sat/sat.cc
+++ b/passes/sat/sat.cc
@@ -256,13 +256,13 @@ struct SatHelper
 		{
 			RTLIL::SigSpec big_lhs, big_rhs;
 
-			for (auto &it : module->wires_)
+			for (auto wire : module->wires())
 			{
-				if (it.second->attributes.count(ID::init) == 0)
+				if (wire->attributes.count(ID::init) == 0)
 					continue;
 
-				RTLIL::SigSpec lhs = sigmap(it.second);
-				RTLIL::SigSpec rhs = it.second->attributes.at(ID::init);
+				RTLIL::SigSpec lhs = sigmap(wire);
+				RTLIL::SigSpec rhs = wire->attributes.at(ID::init);
 				log_assert(lhs.size() == rhs.size());
 
 				RTLIL::SigSpec removed_bits;