From: Yunsup Lee <yunsup@cs.berkeley.edu>
Date: Tue, 17 Mar 2015 11:32:53 +0000 (-0700)
Subject: change hwacha cause to follow risc-v cause
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=0c1f8bb8b777619129f55ce4a048c3f63ecca6c0;p=riscv-isa-sim.git

change hwacha cause to follow risc-v cause
---

diff --git a/hwacha/hwacha_xcpt.h b/hwacha/hwacha_xcpt.h
index 5c4dacc..3f56c3c 100644
--- a/hwacha/hwacha_xcpt.h
+++ b/hwacha/hwacha_xcpt.h
@@ -1,17 +1,19 @@
 #ifndef _HWACHA_XCPT_H
 #define _HWACHA_XCPT_H
 
-#define HWACHA_CAUSE_ILLEGAL_CFG 0 // AUX: 0=illegal nxpr, 1=illegal nfpr
-#define HWACHA_CAUSE_ILLEGAL_INSTRUCTION 1 // AUX: instruction
-#define HWACHA_CAUSE_PRIVILEGED_INSTRUCTION 2 // AUX: instruction
-#define HWACHA_CAUSE_TVEC_ILLEGAL_REGID 3 // AUX: instruction
-#define HWACHA_CAUSE_VF_MISALIGNED_FETCH 4 // AUX: pc
-#define HWACHA_CAUSE_VF_FAULT_FETCH 5 // AUX: pc
-#define HWACHA_CAUSE_VF_ILLEGAL_INSTRUCTION 6 // AUX: pc
-#define HWACHA_CAUSE_VF_ILLEGAL_REGID 7 // AUX: pc
-#define HWACHA_CAUSE_MISALIGNED_LOAD 8 // AUX: badvaddr
-#define HWACHA_CAUSE_MISALIGNED_STORE 9 // AUX: badvaddr
-#define HWACHA_CAUSE_FAULT_LOAD 10 // AUX: badvaddr
-#define HWACHA_CAUSE_FAULT_STORE 11 // AUX: badvaddr
+#include "encoding.h"
+
+#define HWACHA_CAUSE_ILLEGAL_CFG CAUSE_ILLEGAL_INSTRUCTION // AUX: 0=illegal nxpr, 1=illegal nfpr
+#define HWACHA_CAUSE_ILLEGAL_INSTRUCTION CAUSE_ILLEGAL_INSTRUCTION // AUX: instruction
+#define HWACHA_CAUSE_PRIVILEGED_INSTRUCTION CAUSE_ILLEGAL_INSTRUCTION // AUX: instruction
+#define HWACHA_CAUSE_TVEC_ILLEGAL_REGID CAUSE_ILLEGAL_INSTRUCTION // AUX: instruction
+#define HWACHA_CAUSE_VF_MISALIGNED_FETCH CAUSE_MISALIGNED_FETCH // AUX: pc
+#define HWACHA_CAUSE_VF_FAULT_FETCH CAUSE_FAULT_FETCH // AUX: pc
+#define HWACHA_CAUSE_VF_ILLEGAL_INSTRUCTION CAUSE_ILLEGAL_INSTRUCTION // AUX: pc
+#define HWACHA_CAUSE_VF_ILLEGAL_REGID CAUSE_ILLEGAL_INSTRUCTION // AUX: pc
+#define HWACHA_CAUSE_MISALIGNED_LOAD CAUSE_MISALIGNED_LOAD // AUX: badvaddr
+#define HWACHA_CAUSE_MISALIGNED_STORE CAUSE_MISALIGNED_STORE // AUX: badvaddr
+#define HWACHA_CAUSE_FAULT_LOAD CAUSE_FAULT_LOAD // AUX: badvaddr
+#define HWACHA_CAUSE_FAULT_STORE CAUSE_FAULT_STORE // AUX: badvaddr
 
 #endif