From: lkcl <lkcl@web>
Date: Sat, 1 Apr 2023 01:08:16 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls012_v1~203
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=0c2184d15114f155e5e42560ee7c965ac094b2c2;p=libreriscv.git

---

diff --git a/openpower/sv/svp64-single.mdwn b/openpower/sv/svp64-single.mdwn
index bf46167b2..59623e30f 100644
--- a/openpower/sv/svp64-single.mdwn
+++ b/openpower/sv/svp64-single.mdwn
@@ -12,6 +12,8 @@ encodings concepts:
 
 totals 20 bits leaving 4 for a "Mode".
 
-* arithmetic can have saturation
+* arithmetic can have saturation (2 bits?)
 * LD/ST-update needs Post-Increment, others incl. SEA (Signed Effective Address)
   another bit adds CIA for PC-relative
+
+potentially this leaves 2 bits for SUBVL.