From: Kenneth Graunke <kenneth@whitecape.org>
Date: Tue, 27 Nov 2018 04:55:59 +0000 (-0800)
Subject: iris: for BLORP, only use the predicate enable bit when USE_BIT
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=0c3ea03e4bcc4a334d862cf96b3fa70a5b8a64cc;p=mesa.git

iris: for BLORP, only use the predicate enable bit when USE_BIT
---

diff --git a/src/gallium/drivers/iris/iris_blit.c b/src/gallium/drivers/iris/iris_blit.c
index 729d8f7b038..b8562d08945 100644
--- a/src/gallium/drivers/iris/iris_blit.c
+++ b/src/gallium/drivers/iris/iris_blit.c
@@ -254,6 +254,15 @@ iris_blit(struct pipe_context *ctx, const struct pipe_blit_info *info)
    struct iris_context *ice = (void *) ctx;
    struct iris_screen *screen = (struct iris_screen *)ctx->screen;
    const struct gen_device_info *devinfo = &screen->devinfo;
+   enum blorp_batch_flags blorp_flags = 0;
+
+   if (info->render_condition_enable) {
+      if (ice->predicate == IRIS_PREDICATE_STATE_DONT_RENDER)
+         return;
+
+      if (ice->predicate == IRIS_PREDICATE_STATE_USE_BIT)
+         blorp_flags |= BLORP_BATCH_PREDICATE_ENABLE;
+   }
 
    struct blorp_surf src_surf, dst_surf;
    iris_blorp_surf_for_resource(&src_surf, info->src.resource,
@@ -338,8 +347,7 @@ iris_blit(struct pipe_context *ctx, const struct pipe_blit_info *info)
    struct iris_batch *batch = &ice->batches[IRIS_BATCH_RENDER];
 
    struct blorp_batch blorp_batch;
-   blorp_batch_init(&ice->blorp, &blorp_batch, batch,
-                    info->render_condition_enable ? BLORP_BATCH_PREDICATE_ENABLE : 0);
+   blorp_batch_init(&ice->blorp, &blorp_batch, batch, blorp_flags);
 
    for (int slice = 0; slice < info->dst.box.depth; slice++) {
       iris_batch_maybe_flush(batch, 1500);
diff --git a/src/gallium/drivers/iris/iris_clear.c b/src/gallium/drivers/iris/iris_clear.c
index 7f113fa3657..493ebaa9ad7 100644
--- a/src/gallium/drivers/iris/iris_clear.c
+++ b/src/gallium/drivers/iris/iris_clear.c
@@ -53,10 +53,17 @@ iris_clear(struct pipe_context *ctx,
 
    struct iris_batch *batch = &ice->batches[IRIS_BATCH_RENDER];
 
+   if (ice->predicate == IRIS_PREDICATE_STATE_DONT_RENDER)
+      return;
+
+   enum blorp_batch_flags blorp_flags = 0;
+   if (ice->predicate == IRIS_PREDICATE_STATE_USE_BIT)
+      blorp_flags |= BLORP_BATCH_PREDICATE_ENABLE;
+
    iris_batch_maybe_flush(batch, 1500);
 
    struct blorp_batch blorp_batch;
-   blorp_batch_init(&ice->blorp, &blorp_batch, batch, BLORP_BATCH_PREDICATE_ENABLE);
+   blorp_batch_init(&ice->blorp, &blorp_batch, batch, blorp_flags);
 
    if (buffers & PIPE_CLEAR_DEPTHSTENCIL) {
       struct pipe_surface *psurf = cso_fb->zsbuf;