From: lkcl Date: Sun, 5 Jun 2022 14:29:50 +0000 (+0100) Subject: (no commit message) X-Git-Tag: opf_rfc_ls005_v1~1946 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=0cb0f7ec7dc21470b403ed95fb6ea31229ea60b3;p=libreriscv.git --- diff --git a/openpower/sv/remap.mdwn b/openpower/sv/remap.mdwn index 1d10b4174..9e832390b 100644 --- a/openpower/sv/remap.mdwn +++ b/openpower/sv/remap.mdwn @@ -221,7 +221,7 @@ Form: SVM-Form SV "Matrix" Form (see [[isatables/fields.text]]) Fields: -* **SVxd** - SV REMAP "xdim" +* **SVxd** - SV REMAP "xdim" (SVGPR>>1 for Indexed REMAP) * **SVyd** - SV REMAP "ydim" * **SVzd** - SV REMAP "zdim" * **SVRM** - SV REMAP Mode (0b00000 for Matrix, 0b00001 for FFT etc.) @@ -250,6 +250,11 @@ Fields: Examples showing how all of these Modes operate exists in the online [SVP64 unit tests](https://git.libre-soc.org/?p=openpower-isa.git;a=tree;f=src/openpower/decoder/isa;hb=HEAD) +In Indexed Mode, there are only 5 bits available to specify the GPR +to use, out of 128 GPRs (7 bit numbering). Therefore, only the top +5 bits are given in the `SVxd` field: the bottom two implicit bits +will be zero (`SVxd || 0b00`). + `svshape` has *limited applicability* due to being a 32-bit instruction. The full capability of SVSHAPE SPRs may be accessed by directly writing to SVSHAPE0-3 with `mtspr`. Circumstances include Matrices with dimensions