From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Fri, 25 Mar 2022 14:53:01 +0000 (+0000)
Subject: increase time for power-on-delay to 2^25 in ECP5
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=0cd8c83ff34d11b4fed0416f04ba069ccf79580d;p=ls2.git

increase time for power-on-delay to 2^25 in ECP5
---

diff --git a/src/crg.py b/src/crg.py
index af2ccb1..a5370b7 100644
--- a/src/crg.py
+++ b/src/crg.py
@@ -206,7 +206,7 @@ class ECPIX5CRG(Elaboratable):
         m.submodules.pll = pll = PLL(ClockSignal("rawclk"), reset=~reset)
 
         # Power-on delay (655us)
-        podcnt = Signal(23, reset=-1)
+        podcnt = Signal(25, reset=-1)
         pod_done = Signal()
         with m.If((podcnt != 0) & pll.locked):
             m.d.rawclk += podcnt.eq(podcnt-1)