From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Sat, 5 Jun 2021 12:19:02 +0000 (+0000)
Subject: correct clock name for H-Tree in ls180
X-Git-Tag: LS180_RC3~27^2~8
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=0cfe088e904a5a48acad3fb83a6f16164b80a0a4;p=soclayout.git

correct clock name for H-Tree in ls180
use por_clk not core.por_clk
this is the output from the PLL
---

diff --git a/experiments9/doDesign.py b/experiments9/doDesign.py
index fd61b7a..0eba1cf 100644
--- a/experiments9/doDesign.py
+++ b/experiments9/doDesign.py
@@ -58,7 +58,7 @@ def scriptMain (**kw):
         ls180Conf.chipConf.ioPadGauge = 'niolib'
         ls180Conf.coreSize = (l(coreSize     ), l(coreSize     ))
         ls180Conf.chipSize = (l(coreSize+3360), l(coreSize+3360))
-        ls180Conf.useHTree('core.por_clk')
+        ls180Conf.useHTree('por_clk') # output from the PLL, needs to be H-Tree
         ls180Conf.useHTree('jtag_tck_from_pad')
 
         ls180ToChip = CoreToChip( ls180Conf )