From: Sebastien Bourdeauducq Date: Sun, 14 Apr 2013 15:06:29 +0000 (+0200) Subject: dvisampler/chansync: use Record.raw_bits() X-Git-Tag: 24jan2021_ls180~2983 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=0d21711c1b601968ea324c3ec5416a76649760fa;p=litex.git dvisampler/chansync: use Record.raw_bits() --- diff --git a/milkymist/dvisampler/chansync.py b/milkymist/dvisampler/chansync.py index 4d19cf1b..2a046b65 100644 --- a/milkymist/dvisampler/chansync.py +++ b/milkymist/dvisampler/chansync.py @@ -31,8 +31,8 @@ class ChanSync(Module, AutoCSR): self.add_submodule(fifo, "pix") self.comb += [ fifo.we.eq(self.valid_i), - fifo.din.eq(Cat(*data_in.flatten())), - Cat(*data_out.flatten()).eq(fifo.dout) + fifo.din.eq(data_in.raw_bits()), + data_out.raw_bits().eq(fifo.dout) ] is_control = Signal() is_control_r = Signal()