From: Richard Sandiford Date: Wed, 18 Oct 2006 13:02:01 +0000 (+0000) Subject: ld/testsuite/ X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=0d22c9559b677a7ce0dffbc29ea754c6c69da0d2;p=binutils-gdb.git ld/testsuite/ * ld-mips-elf/reloc-1-n64.d: Match 16-character VMAs on LP64 hosts. --- diff --git a/ld/testsuite/ChangeLog b/ld/testsuite/ChangeLog index e94c09ae614..89c147b09a4 100644 --- a/ld/testsuite/ChangeLog +++ b/ld/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2006-10-18 Richard Sandiford + + * ld-mips-elf/reloc-1-n64.d: Match 16-character VMAs on LP64 hosts. + 2006-10-18 Richard Sandiford * ld-mips-elf/rel32-n32.d: Bump addresses by 0x20 to account for diff --git a/ld/testsuite/ld-mips-elf/reloc-1-n64.d b/ld/testsuite/ld-mips-elf/reloc-1-n64.d index 2db8fca6716..42d74ea6be2 100644 --- a/ld/testsuite/ld-mips-elf/reloc-1-n64.d +++ b/ld/testsuite/ld-mips-elf/reloc-1-n64.d @@ -8,16 +8,16 @@ Relocation section '\.rela\.text' .* # # Relocations against tstarta # -.* R_MIPS_HI16 .* \.text \+ ffff7ff0 +.* R_MIPS_HI16 .* \.text \+ f+7ff0 .* R_MIPS_NONE * .* R_MIPS_NONE * -.* R_MIPS_LO16 .* \.text \+ ffff7ff0 +.* R_MIPS_LO16 .* \.text \+ f+7ff0 .* R_MIPS_NONE * .* R_MIPS_NONE * -.* R_MIPS_HI16 .* \.text \+ ffff8000 +.* R_MIPS_HI16 .* \.text \+ f+8000 .* R_MIPS_NONE * .* R_MIPS_NONE * -.* R_MIPS_LO16 .* \.text \+ ffff8000 +.* R_MIPS_LO16 .* \.text \+ f+8000 .* R_MIPS_NONE * .* R_MIPS_NONE * .* R_MIPS_HI16 .* \.text \+ 0 @@ -41,16 +41,16 @@ Relocation section '\.rela\.text' .* # # Relocations against t32a # -.* R_MIPS_HI16 .* \.text \+ ffff8010 +.* R_MIPS_HI16 .* \.text \+ f+8010 .* R_MIPS_NONE * .* R_MIPS_NONE * -.* R_MIPS_LO16 .* \.text \+ ffff8010 +.* R_MIPS_LO16 .* \.text \+ f+8010 .* R_MIPS_NONE * .* R_MIPS_NONE * -.* R_MIPS_HI16 .* \.text \+ ffff8020 +.* R_MIPS_HI16 .* \.text \+ f+8020 .* R_MIPS_NONE * .* R_MIPS_NONE * -.* R_MIPS_LO16 .* \.text \+ ffff8020 +.* R_MIPS_LO16 .* \.text \+ f+8020 .* R_MIPS_NONE * .* R_MIPS_NONE * .* R_MIPS_HI16 .* \.text \+ 20 @@ -74,16 +74,16 @@ Relocation section '\.rela\.text' .* # # Relocations against _start # -.* R_MIPS_HI16 .* _start \+ ffff7ff0 +.* R_MIPS_HI16 .* _start \+ f+7ff0 .* R_MIPS_NONE * .* R_MIPS_NONE * -.* R_MIPS_LO16 .* _start \+ ffff7ff0 +.* R_MIPS_LO16 .* _start \+ f+7ff0 .* R_MIPS_NONE * .* R_MIPS_NONE * -.* R_MIPS_HI16 .* _start \+ ffff8000 +.* R_MIPS_HI16 .* _start \+ f+8000 .* R_MIPS_NONE * .* R_MIPS_NONE * -.* R_MIPS_LO16 .* _start \+ ffff8000 +.* R_MIPS_LO16 .* _start \+ f+8000 .* R_MIPS_NONE * .* R_MIPS_NONE * .* R_MIPS_HI16 .* _start \+ 0 @@ -107,16 +107,16 @@ Relocation section '\.rela\.text' .* # # Relocations against tstarta # -.* R_MIPS_GOT16 .* \.text \+ ffff7ff0 +.* R_MIPS_GOT16 .* \.text \+ f+7ff0 .* R_MIPS_NONE * .* R_MIPS_NONE * -.* R_MIPS_LO16 .* \.text \+ ffff7ff0 +.* R_MIPS_LO16 .* \.text \+ f+7ff0 .* R_MIPS_NONE * .* R_MIPS_NONE * -.* R_MIPS_GOT16 .* \.text \+ ffff8000 +.* R_MIPS_GOT16 .* \.text \+ f+8000 .* R_MIPS_NONE * .* R_MIPS_NONE * -.* R_MIPS_LO16 .* \.text \+ ffff8000 +.* R_MIPS_LO16 .* \.text \+ f+8000 .* R_MIPS_NONE * .* R_MIPS_NONE * .* R_MIPS_GOT16 .* \.text \+ 0 @@ -140,16 +140,16 @@ Relocation section '\.rela\.text' .* # # Relocations against t32a # -.* R_MIPS_GOT16 .* \.text \+ ffff8010 +.* R_MIPS_GOT16 .* \.text \+ f+8010 .* R_MIPS_NONE * .* R_MIPS_NONE * -.* R_MIPS_LO16 .* \.text \+ ffff8010 +.* R_MIPS_LO16 .* \.text \+ f+8010 .* R_MIPS_NONE * .* R_MIPS_NONE * -.* R_MIPS_GOT16 .* \.text \+ ffff8020 +.* R_MIPS_GOT16 .* \.text \+ f+8020 .* R_MIPS_NONE * .* R_MIPS_NONE * -.* R_MIPS_LO16 .* \.text \+ ffff8020 +.* R_MIPS_LO16 .* \.text \+ f+8020 .* R_MIPS_NONE * .* R_MIPS_NONE * .* R_MIPS_GOT16 .* \.text \+ 20 @@ -173,7 +173,7 @@ Relocation section '\.rela\.text' .* # # Relocations against sdg # -.* R_MIPS_GPREL16 .* sdg \+ fffffffc +.* R_MIPS_GPREL16 .* sdg \+ f+fffc .* R_MIPS_NONE * .* R_MIPS_NONE * .* R_MIPS_GPREL16 .* sdg \+ 0 @@ -186,19 +186,19 @@ Relocation section '\.rela\.text' .* # Relocations against sdla. .sdata should be the first piece of gp-relative # data, which the linker script should put _gp - 0x7ff0. # -.* R_MIPS_GPREL16 .* \.sdata \+ ffff801c +.* R_MIPS_GPREL16 .* \.sdata \+ f+801c .* R_MIPS_NONE * .* R_MIPS_NONE * -.* R_MIPS_GPREL16 .* \.sdata \+ ffff8020 +.* R_MIPS_GPREL16 .* \.sdata \+ f+8020 .* R_MIPS_NONE * .* R_MIPS_NONE * -.* R_MIPS_GPREL16 .* \.sdata \+ ffff8024 +.* R_MIPS_GPREL16 .* \.sdata \+ f+8024 .* R_MIPS_NONE * .* R_MIPS_NONE * # # Relocations against tstarta # -.* R_MIPS_26 .* \.text \+ fffffffc +.* R_MIPS_26 .* \.text \+ f+fffc .* R_MIPS_NONE * .* R_MIPS_NONE * .* R_MIPS_26 .* \.text \+ 0 @@ -222,7 +222,7 @@ Relocation section '\.rela\.text' .* # # Relocations against _start # -.* R_MIPS_26 .* _start \+ fffffffc +.* R_MIPS_26 .* _start \+ f+fffc .* R_MIPS_NONE * .* R_MIPS_NONE * .* R_MIPS_26 .* _start \+ 0 @@ -300,16 +300,16 @@ Relocation section '\.rela\.text' .* # # Relocations against _start # -.* R_MIPS_HI16 .* _start \+ ffff7ff0 +.* R_MIPS_HI16 .* _start \+ f+7ff0 .* R_MIPS_NONE * .* R_MIPS_NONE * -.* R_MIPS_LO16 .* _start \+ ffff7ff0 +.* R_MIPS_LO16 .* _start \+ f+7ff0 .* R_MIPS_NONE * .* R_MIPS_NONE * -.* R_MIPS_HI16 .* _start \+ ffff8000 +.* R_MIPS_HI16 .* _start \+ f+8000 .* R_MIPS_NONE * .* R_MIPS_NONE * -.* R_MIPS_LO16 .* _start \+ ffff8000 +.* R_MIPS_LO16 .* _start \+ f+8000 .* R_MIPS_NONE * .* R_MIPS_NONE * .* R_MIPS_HI16 .* _start \+ 0 @@ -399,7 +399,7 @@ Relocation section '\.rela\.text' .* # # Relocations against sdg # -.* R_MIPS_GPREL16 .* sdg \+ fffffffc +.* R_MIPS_GPREL16 .* sdg \+ f+fffc .* R_MIPS_NONE * .* R_MIPS_NONE * .* R_MIPS_GPREL16 .* sdg \+ 0 @@ -411,13 +411,13 @@ Relocation section '\.rela\.text' .* # # Relocations against sdlb # -.* R_MIPS_GPREL16 .* \.sdata \+ ffff803c +.* R_MIPS_GPREL16 .* \.sdata \+ f+803c .* R_MIPS_NONE * .* R_MIPS_NONE * -.* R_MIPS_GPREL16 .* \.sdata \+ ffff8040 +.* R_MIPS_GPREL16 .* \.sdata \+ f+8040 .* R_MIPS_NONE * .* R_MIPS_NONE * -.* R_MIPS_GPREL16 .* \.sdata \+ ffff8044 +.* R_MIPS_GPREL16 .* \.sdata \+ f+8044 .* R_MIPS_NONE * .* R_MIPS_NONE * # @@ -447,7 +447,7 @@ Relocation section '\.rela\.text' .* # # Relocations against _start # -.* R_MIPS_26 .* _start \+ fffffffc +.* R_MIPS_26 .* _start \+ f+fffc .* R_MIPS_NONE * .* R_MIPS_NONE * .* R_MIPS_26 .* _start \+ 0