From: Shriya Sharma <shriya@redsemiconductor.com>
Date: Wed, 27 Sep 2023 07:29:47 +0000 (+0100)
Subject: Added english language description and brackets for lhbrx instruction
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=0d3fa5d08ac5c22fe4cb3bb6a893a54ad5342b64;p=openpower-isa.git

Added english language description and brackets for lhbrx instruction
---

diff --git a/openpower/isa/fixedload.mdwn b/openpower/isa/fixedload.mdwn
index 02553435..15774d3c 100644
--- a/openpower/isa/fixedload.mdwn
+++ b/openpower/isa/fixedload.mdwn
@@ -660,6 +660,14 @@ Pseudo-code:
     load_data <- MEM(EA, 2)
     RT <- [0]*48 || load_data[8:15] || load_data[0:7]
 
+Description:
+
+    Let the effective address (EA) be the sum (RA|0)+(RB).
+    Bits 0:7 of the halfword in storage addressed by EA are
+    loaded into RT 56:63 . Bits 8:15 of the halfword in storage
+    addressed by EA are loaded into RT[48:55] . RT[0:47] are
+    set to 0.
+
 Special Registers Altered:
 
     None