From: lkcl <lkcl@web>
Date: Sat, 15 Apr 2023 22:51:19 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls009_v1~55
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=0e0b3c5c143cd6f0506f4bc80ae76555a7ac7959;p=libreriscv.git

---

diff --git a/openpower/sv/remap.mdwn b/openpower/sv/remap.mdwn
index 1d5d94027..39e4d4aea 100644
--- a/openpower/sv/remap.mdwn
+++ b/openpower/sv/remap.mdwn
@@ -78,7 +78,8 @@ directly into Register Hazard Management
 As long as the SVSHAPE SPRs
 are not written to directly, Hardware may treat REMAP as 100%
 Deterministic: all REMAP Management instructions take static
-operands with the exception of Indexed Mode, and even then
+operands (no dynamic register operands)
+with the exception of Indexed Mode, and even then
 Architectural State is permitted to assume that the Indices
 are cacheable from the point at which the `svindex` instruction
 is executed.