From: Sebastien Bourdeauducq Date: Fri, 2 Aug 2013 21:05:54 +0000 (+0200) Subject: bank/csrgen: add get_offset function to pre-calculate register addresses X-Git-Tag: 24jan2021_ls180~2099^2~488 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=0e195da3c0839cbc5e83bfa4391caa3adc65f844;p=litex.git bank/csrgen: add get_offset function to pre-calculate register addresses --- diff --git a/migen/bank/csrgen.py b/migen/bank/csrgen.py index 3624d90d..320b3ec0 100644 --- a/migen/bank/csrgen.py +++ b/migen/bank/csrgen.py @@ -4,6 +4,14 @@ from migen.fhdl.std import * from migen.bus import csr from migen.bank.description import * +def get_offset(description, name, csr_data_width=8): + offset = 0 + for c in description: + if c.name == name: + return offset + offset += (c.size + csr_data_width - 1)//csr_data_width + raise KeyError("CSR not found: "+name) + class Bank(Module): def __init__(self, description, address=0, bus=None): if bus is None: