From: Nick Clifton Date: Wed, 28 Oct 2015 15:30:05 +0000 (+0000) Subject: Add tests for 16-bit versions of ARM teq, tst, cmp and cmn instructions. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=0e3536f9844e6a6c7a882387ad5d765944f510ad;p=binutils-gdb.git Add tests for 16-bit versions of ARM teq, tst, cmp and cmn instructions. * gas/arm/pinsn.s: New. * gas/arm/pinsn.d: Likewise. --- diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index 02b82dfd8f4..6ccdacdce52 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2015-10-28 Andre Vieira + + * gas/arm/pinsn.s: New. + * gas/arm/pinsn.d: Likewise. + 2015-10-27 Nick Clifton PR binutils/19159 diff --git a/gas/testsuite/gas/arm/pinsn.d b/gas/testsuite/gas/arm/pinsn.d new file mode 100644 index 00000000000..b36cc566c55 --- /dev/null +++ b/gas/testsuite/gas/arm/pinsn.d @@ -0,0 +1,24 @@ +# name: 26-bit teq/cmn/tst/cmp instructions +# objdump: -dr --prefix-addresses --show-raw-insn -marmv4 +# skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd + +.*: +file format .*arm.* + + +Disassembly of section .text: +0+000 <[^>]*> e330f00a ? teqp r0, #10 +0+004 <[^>]*> e132f004 ? teqp r2, r4 +0+008 <[^>]*> e135f287 ? teqp r5, r7, lsl #5 +0+00c <[^>]*> e131f113 ? teqp r1, r3, lsl r1 +0+010 <[^>]*> e370f00a ? cmnp r0, #10 +0+014 <[^>]*> e172f004 ? cmnp r2, r4 +0+018 <[^>]*> e175f287 ? cmnp r5, r7, lsl #5 +0+01c <[^>]*> e171f113 ? cmnp r1, r3, lsl r1 +0+020 <[^>]*> e350f00a ? cmpp r0, #10 +0+024 <[^>]*> e152f004 ? cmpp r2, r4 +0+028 <[^>]*> e155f287 ? cmpp r5, r7, lsl #5 +0+02c <[^>]*> e151f113 ? cmpp r1, r3, lsl r1 +0+030 <[^>]*> e310f00a ? tstp r0, #10 +0+034 <[^>]*> e112f004 ? tstp r2, r4 +0+038 <[^>]*> e115f287 ? tstp r5, r7, lsl #5 +0+03c <[^>]*> e111f113 ? tstp r1, r3, lsl r1 diff --git a/gas/testsuite/gas/arm/pinsn.s b/gas/testsuite/gas/arm/pinsn.s new file mode 100644 index 00000000000..d0afc4655ac --- /dev/null +++ b/gas/testsuite/gas/arm/pinsn.s @@ -0,0 +1,16 @@ +teqp r0, #10 +teqp r2, r4 +teqp r5, r7, lsl #5 +teqp r1, r3, lsl r1 +cmnp r0, #10 +cmnp r2, r4 +cmnp r5, r7, lsl #5 +cmnp r1, r3, lsl r1 +cmpp r0, #10 +cmpp r2, r4 +cmpp r5, r7, lsl #5 +cmpp r1, r3, lsl r1 +tstp r0, #10 +tstp r2, r4 +tstp r5, r7, lsl #5 +tstp r1, r3, lsl r1