From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Thu, 14 May 2020 19:07:18 +0000 (+0100)
Subject: update submodule isa tables to match OP_CMPB moving to Logical
X-Git-Tag: div_pipeline~1220
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=0e7d6a7383f3544596515b07b85c4af5ccfe6275;p=soc.git

update submodule isa tables to match OP_CMPB moving to Logical
---

diff --git a/libreriscv b/libreriscv
index eda9879f..ad0436ee 160000
--- a/libreriscv
+++ b/libreriscv
@@ -1 +1 @@
-Subproject commit eda9879fef1cddcd9fb41fca982a6b86e471905b
+Subproject commit ad0436eed1fcf36e0f1acfde5de71ad2e4b56145