From: Andrew Waterman Date: Mon, 27 Dec 2010 23:34:05 +0000 (-0800) Subject: [sim] fixed some compiler warnings X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=0ea058a5a81930e038dfd3a6a318f4d32893ac5a;p=riscv-isa-sim.git [sim] fixed some compiler warnings --- diff --git a/riscv/insns/div.h b/riscv/insns/div.h index f6a9b6b..1f61cf1 100644 --- a/riscv/insns/div.h +++ b/riscv/insns/div.h @@ -1,5 +1,5 @@ require64; -if(RS2 == 0 || sreg_t(RS1) == INT64_MIN && sreg_t(RS2) == -1) +if(RS2 == 0 || (sreg_t(RS1) == INT64_MIN && sreg_t(RS2) == -1)) RD = sreg_t(RS1) < 0 ? INT64_MIN : INT64_MAX; else RD = sreg_t(RS1) / sreg_t(RS2); diff --git a/riscv/insns/divw.h b/riscv/insns/divw.h index 0537469..bfc982a 100644 --- a/riscv/insns/divw.h +++ b/riscv/insns/divw.h @@ -1,4 +1,4 @@ -if(int32_t(RS2) == 0 || int32_t(RS1) == INT32_MIN && int32_t(RS2) == -1) +if(int32_t(RS2) == 0 || (int32_t(RS1) == INT32_MIN && int32_t(RS2) == -1)) RD = sext32(int32_t(RS1) < 0 ? INT32_MIN : INT32_MAX); else RD = sext32(int32_t(RS1)/int32_t(RS2)); diff --git a/riscv/insns/rem.h b/riscv/insns/rem.h index 146dbc6..1bc94f2 100644 --- a/riscv/insns/rem.h +++ b/riscv/insns/rem.h @@ -1,5 +1,5 @@ require64; -if(RS2 == 0 || sreg_t(RS1) == INT64_MIN && sreg_t(RS2) == -1) +if(RS2 == 0 || (sreg_t(RS1) == INT64_MIN && sreg_t(RS2) == -1)) RD = 0; else RD = sreg_t(RS1) % sreg_t(RS2); diff --git a/riscv/insns/remw.h b/riscv/insns/remw.h index 0e68dc6..eb23ef1 100644 --- a/riscv/insns/remw.h +++ b/riscv/insns/remw.h @@ -1,4 +1,4 @@ -if(int32_t(RS2) == 0 || int32_t(RS1) == INT32_MIN && int32_t(RS2) == -1) +if(int32_t(RS2) == 0 || (int32_t(RS1) == INT32_MIN && int32_t(RS2) == -1)) RD = 0; else RD = sext32(int32_t(RS1) % int32_t(RS2)); diff --git a/riscv/sim.cc b/riscv/sim.cc index 8b04aa2..ffcb186 100644 --- a/riscv/sim.cc +++ b/riscv/sim.cc @@ -4,6 +4,7 @@ #include #include #include +#include sim_t::sim_t(int _nprocs, size_t _memsz, appserver_link_t* _applink) : applink(_applink),