From: Jim Blandy Date: Wed, 14 Jul 2004 23:13:13 +0000 (+0000) Subject: * ppc-tdep.h (ppc_spr_mq, ppc_spr_xer, ppc_spr_rtcu, ppc_spr_rtcl) X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=0ea0ec5f1d3e4ab02963bb26b7cfba81f0f472a7;p=binutils-gdb.git * ppc-tdep.h (ppc_spr_mq, ppc_spr_xer, ppc_spr_rtcu, ppc_spr_rtcl) (ppc_spr_lr, ppc_spr_ctr, ppc_spr_cnt, ppc_spr_dsisr, ppc_spr_dar) (ppc_spr_dec, ppc_spr_sdr1, ppc_spr_srr0, ppc_spr_srr1) (ppc_spr_eie, ppc_spr_eid, ppc_spr_nri, ppc_spr_sp, ppc_spr_cmpa) (ppc_spr_cmpb, ppc_spr_cmpc, ppc_spr_cmpd, ppc_spr_icr) (ppc_spr_der, ppc_spr_counta, ppc_spr_countb, ppc_spr_cmpe) (ppc_spr_cmpf, ppc_spr_cmpg, ppc_spr_cmph, ppc_spr_lctrl1) (ppc_spr_lctrl2, ppc_spr_ictrl, ppc_spr_bar, ppc_spr_vrsave) (ppc_spr_sprg0, ppc_spr_sprg1, ppc_spr_sprg2, ppc_spr_sprg3) (ppc_spr_ear, ppc_spr_tbl, ppc_spr_tbu, ppc_spr_pvr) (ppc_spr_spefscr, ppc_spr_ibat0u, ppc_spr_ibat0l, ppc_spr_ibat1u) (ppc_spr_ibat1l, ppc_spr_ibat2u, ppc_spr_ibat2l, ppc_spr_ibat3u) (ppc_spr_ibat3l, ppc_spr_dbat0u, ppc_spr_dbat0l, ppc_spr_dbat1u) (ppc_spr_dbat1l, ppc_spr_dbat2u, ppc_spr_dbat2l, ppc_spr_dbat3u) (ppc_spr_dbat3l, ppc_spr_ic_cst, ppc_spr_ic_adr, ppc_spr_ic_dat) (ppc_spr_dc_cst, ppc_spr_dc_adr, ppc_spr_dc_dat, ppc_spr_dpdr) (ppc_spr_dpir, ppc_spr_immr, ppc_spr_mi_ctr, ppc_spr_mi_ap) (ppc_spr_mi_epn, ppc_spr_mi_twc, ppc_spr_mi_rpn, ppc_spr_mi_cam) (ppc_spr_mi_ram0, ppc_spr_mi_ram1, ppc_spr_md_ctr, ppc_spr_m_casid) (ppc_spr_md_ap, ppc_spr_md_epn, ppc_spr_md_twb, ppc_spr_md_twc) (ppc_spr_md_rpn, ppc_spr_m_tw, ppc_spr_md_dbcam, ppc_spr_md_dbram0) (ppc_spr_md_dbram1, ppc_spr_ummcr0, ppc_spr_upmc1, ppc_spr_upmc2) (ppc_spr_usia, ppc_spr_ummcr1, ppc_spr_upmc3, ppc_spr_upmc4) (ppc_spr_zpr, ppc_spr_pid, ppc_spr_mmcr0, ppc_spr_pmc1) (ppc_spr_sgr, ppc_spr_pmc2, ppc_spr_dcwr, ppc_spr_sia) (ppc_spr_mmcr1, ppc_spr_pmc3, ppc_spr_pmc4, ppc_spr_sda) (ppc_spr_tbhu, ppc_spr_tblu, ppc_spr_dmiss, ppc_spr_dcmp) (ppc_spr_hash1, ppc_spr_hash2, ppc_spr_icdbdr, ppc_spr_imiss) (ppc_spr_esr, ppc_spr_icmp, ppc_spr_dear, ppc_spr_rpa) (ppc_spr_evpr, ppc_spr_cdbcr, ppc_spr_tsr, ppc_spr_602_tcr) (ppc_spr_403_tcr, ppc_spr_ibr, ppc_spr_pit, ppc_spr_esasrr) (ppc_spr_tbhi, ppc_spr_tblo, ppc_spr_srr2, ppc_spr_sebr) (ppc_spr_srr3, ppc_spr_ser, ppc_spr_hid0, ppc_spr_dbsr) (ppc_spr_hid1, ppc_spr_iabr, ppc_spr_dbcr, ppc_spr_iac1) (ppc_spr_dabr, ppc_spr_iac2, ppc_spr_dac1, ppc_spr_dac2) (ppc_spr_l2cr, ppc_spr_dccr, ppc_spr_ictc, ppc_spr_iccr) (ppc_spr_thrm1, ppc_spr_pbl1, ppc_spr_thrm2, ppc_spr_pbu1) (ppc_spr_thrm3, ppc_spr_pbl2, ppc_spr_fpecr, ppc_spr_lt) (ppc_spr_pir, ppc_spr_pbu2): New enum constants for PowerPC special-purpose register numbers. --- diff --git a/gdb/ChangeLog b/gdb/ChangeLog index 3222e26039b..3cefc77862f 100644 --- a/gdb/ChangeLog +++ b/gdb/ChangeLog @@ -1,5 +1,46 @@ 2004-07-14 Jim Blandy + * ppc-tdep.h (ppc_spr_mq, ppc_spr_xer, ppc_spr_rtcu, ppc_spr_rtcl) + (ppc_spr_lr, ppc_spr_ctr, ppc_spr_cnt, ppc_spr_dsisr, ppc_spr_dar) + (ppc_spr_dec, ppc_spr_sdr1, ppc_spr_srr0, ppc_spr_srr1) + (ppc_spr_eie, ppc_spr_eid, ppc_spr_nri, ppc_spr_sp, ppc_spr_cmpa) + (ppc_spr_cmpb, ppc_spr_cmpc, ppc_spr_cmpd, ppc_spr_icr) + (ppc_spr_der, ppc_spr_counta, ppc_spr_countb, ppc_spr_cmpe) + (ppc_spr_cmpf, ppc_spr_cmpg, ppc_spr_cmph, ppc_spr_lctrl1) + (ppc_spr_lctrl2, ppc_spr_ictrl, ppc_spr_bar, ppc_spr_vrsave) + (ppc_spr_sprg0, ppc_spr_sprg1, ppc_spr_sprg2, ppc_spr_sprg3) + (ppc_spr_ear, ppc_spr_tbl, ppc_spr_tbu, ppc_spr_pvr) + (ppc_spr_spefscr, ppc_spr_ibat0u, ppc_spr_ibat0l, ppc_spr_ibat1u) + (ppc_spr_ibat1l, ppc_spr_ibat2u, ppc_spr_ibat2l, ppc_spr_ibat3u) + (ppc_spr_ibat3l, ppc_spr_dbat0u, ppc_spr_dbat0l, ppc_spr_dbat1u) + (ppc_spr_dbat1l, ppc_spr_dbat2u, ppc_spr_dbat2l, ppc_spr_dbat3u) + (ppc_spr_dbat3l, ppc_spr_ic_cst, ppc_spr_ic_adr, ppc_spr_ic_dat) + (ppc_spr_dc_cst, ppc_spr_dc_adr, ppc_spr_dc_dat, ppc_spr_dpdr) + (ppc_spr_dpir, ppc_spr_immr, ppc_spr_mi_ctr, ppc_spr_mi_ap) + (ppc_spr_mi_epn, ppc_spr_mi_twc, ppc_spr_mi_rpn, ppc_spr_mi_cam) + (ppc_spr_mi_ram0, ppc_spr_mi_ram1, ppc_spr_md_ctr, ppc_spr_m_casid) + (ppc_spr_md_ap, ppc_spr_md_epn, ppc_spr_md_twb, ppc_spr_md_twc) + (ppc_spr_md_rpn, ppc_spr_m_tw, ppc_spr_md_dbcam, ppc_spr_md_dbram0) + (ppc_spr_md_dbram1, ppc_spr_ummcr0, ppc_spr_upmc1, ppc_spr_upmc2) + (ppc_spr_usia, ppc_spr_ummcr1, ppc_spr_upmc3, ppc_spr_upmc4) + (ppc_spr_zpr, ppc_spr_pid, ppc_spr_mmcr0, ppc_spr_pmc1) + (ppc_spr_sgr, ppc_spr_pmc2, ppc_spr_dcwr, ppc_spr_sia) + (ppc_spr_mmcr1, ppc_spr_pmc3, ppc_spr_pmc4, ppc_spr_sda) + (ppc_spr_tbhu, ppc_spr_tblu, ppc_spr_dmiss, ppc_spr_dcmp) + (ppc_spr_hash1, ppc_spr_hash2, ppc_spr_icdbdr, ppc_spr_imiss) + (ppc_spr_esr, ppc_spr_icmp, ppc_spr_dear, ppc_spr_rpa) + (ppc_spr_evpr, ppc_spr_cdbcr, ppc_spr_tsr, ppc_spr_602_tcr) + (ppc_spr_403_tcr, ppc_spr_ibr, ppc_spr_pit, ppc_spr_esasrr) + (ppc_spr_tbhi, ppc_spr_tblo, ppc_spr_srr2, ppc_spr_sebr) + (ppc_spr_srr3, ppc_spr_ser, ppc_spr_hid0, ppc_spr_dbsr) + (ppc_spr_hid1, ppc_spr_iabr, ppc_spr_dbcr, ppc_spr_iac1) + (ppc_spr_dabr, ppc_spr_iac2, ppc_spr_dac1, ppc_spr_dac2) + (ppc_spr_l2cr, ppc_spr_dccr, ppc_spr_ictc, ppc_spr_iccr) + (ppc_spr_thrm1, ppc_spr_pbl1, ppc_spr_thrm2, ppc_spr_pbu1) + (ppc_spr_thrm3, ppc_spr_pbl2, ppc_spr_fpecr, ppc_spr_lt) + (ppc_spr_pir, ppc_spr_pbu2): New enum constants for PowerPC + special-purpose register numbers. + * rs6000-tdep.c (registers_860): Correct register name. (No PPC manual mentions 'md_twb', but many mention 'm_twb', and at that point in the register list.) diff --git a/gdb/ppc-tdep.h b/gdb/ppc-tdep.h index f770530f0d8..794ba07a4e3 100644 --- a/gdb/ppc-tdep.h +++ b/gdb/ppc-tdep.h @@ -177,4 +177,182 @@ enum ppc_num_fprs = 32 /* 32 floating-point registers */ }; + +/* Constants for SPR register numbers. These are *not* GDB register + numbers: they are the numbers used in the PowerPC ISA itself to + refer to these registers. + + This table includes all the SPRs from all the variants I could find + documentation for. + + There may be registers from different PowerPC variants assigned the + same number, but that's fine: GDB and the SIM always use the + numbers in the context of a particular variant, so it's not + ambiguous. + + We need to deviate from the naming pattern when variants have + special-purpose registers of the same name, but with different + numbers. Fortunately, this is rare: look below to see how we + handle the 'tcr' registers on the 403/403GX and 602. */ + +enum + { + ppc_spr_mq = 0, + ppc_spr_xer = 1, + ppc_spr_rtcu = 4, + ppc_spr_rtcl = 5, + ppc_spr_lr = 8, + ppc_spr_ctr = 9, + ppc_spr_cnt = 9, + ppc_spr_dsisr = 18, + ppc_spr_dar = 19, + ppc_spr_dec = 22, + ppc_spr_sdr1 = 25, + ppc_spr_srr0 = 26, + ppc_spr_srr1 = 27, + ppc_spr_eie = 80, + ppc_spr_eid = 81, + ppc_spr_nri = 82, + ppc_spr_sp = 102, + ppc_spr_cmpa = 144, + ppc_spr_cmpb = 145, + ppc_spr_cmpc = 146, + ppc_spr_cmpd = 147, + ppc_spr_icr = 148, + ppc_spr_der = 149, + ppc_spr_counta = 150, + ppc_spr_countb = 151, + ppc_spr_cmpe = 152, + ppc_spr_cmpf = 153, + ppc_spr_cmpg = 154, + ppc_spr_cmph = 155, + ppc_spr_lctrl1 = 156, + ppc_spr_lctrl2 = 157, + ppc_spr_ictrl = 158, + ppc_spr_bar = 159, + ppc_spr_vrsave = 256, + ppc_spr_sprg0 = 272, + ppc_spr_sprg1 = 273, + ppc_spr_sprg2 = 274, + ppc_spr_sprg3 = 275, + ppc_spr_ear = 282, + ppc_spr_tbl = 284, + ppc_spr_tbu = 285, + ppc_spr_pvr = 287, + ppc_spr_spefscr = 512, + ppc_spr_ibat0u = 528, + ppc_spr_ibat0l = 529, + ppc_spr_ibat1u = 530, + ppc_spr_ibat1l = 531, + ppc_spr_ibat2u = 532, + ppc_spr_ibat2l = 533, + ppc_spr_ibat3u = 534, + ppc_spr_ibat3l = 535, + ppc_spr_dbat0u = 536, + ppc_spr_dbat0l = 537, + ppc_spr_dbat1u = 538, + ppc_spr_dbat1l = 539, + ppc_spr_dbat2u = 540, + ppc_spr_dbat2l = 541, + ppc_spr_dbat3u = 542, + ppc_spr_dbat3l = 543, + ppc_spr_ic_cst = 560, + ppc_spr_ic_adr = 561, + ppc_spr_ic_dat = 562, + ppc_spr_dc_cst = 568, + ppc_spr_dc_adr = 569, + ppc_spr_dc_dat = 570, + ppc_spr_dpdr = 630, + ppc_spr_dpir = 631, + ppc_spr_immr = 638, + ppc_spr_mi_ctr = 784, + ppc_spr_mi_ap = 786, + ppc_spr_mi_epn = 787, + ppc_spr_mi_twc = 789, + ppc_spr_mi_rpn = 790, + ppc_spr_mi_cam = 816, + ppc_spr_mi_ram0 = 817, + ppc_spr_mi_ram1 = 818, + ppc_spr_md_ctr = 792, + ppc_spr_m_casid = 793, + ppc_spr_md_ap = 794, + ppc_spr_md_epn = 795, + ppc_spr_md_twb = 796, + ppc_spr_md_twc = 797, + ppc_spr_md_rpn = 798, + ppc_spr_m_tw = 799, + ppc_spr_md_dbcam = 824, + ppc_spr_md_dbram0 = 825, + ppc_spr_md_dbram1 = 826, + ppc_spr_ummcr0 = 936, + ppc_spr_upmc1 = 937, + ppc_spr_upmc2 = 938, + ppc_spr_usia = 939, + ppc_spr_ummcr1 = 940, + ppc_spr_upmc3 = 941, + ppc_spr_upmc4 = 942, + ppc_spr_zpr = 944, + ppc_spr_pid = 945, + ppc_spr_mmcr0 = 952, + ppc_spr_pmc1 = 953, + ppc_spr_sgr = 953, + ppc_spr_pmc2 = 954, + ppc_spr_dcwr = 954, + ppc_spr_sia = 955, + ppc_spr_mmcr1 = 956, + ppc_spr_pmc3 = 957, + ppc_spr_pmc4 = 958, + ppc_spr_sda = 959, + ppc_spr_tbhu = 972, + ppc_spr_tblu = 973, + ppc_spr_dmiss = 976, + ppc_spr_dcmp = 977, + ppc_spr_hash1 = 978, + ppc_spr_hash2 = 979, + ppc_spr_icdbdr = 979, + ppc_spr_imiss = 980, + ppc_spr_esr = 980, + ppc_spr_icmp = 981, + ppc_spr_dear = 981, + ppc_spr_rpa = 982, + ppc_spr_evpr = 982, + ppc_spr_cdbcr = 983, + ppc_spr_tsr = 984, + ppc_spr_602_tcr = 984, + ppc_spr_403_tcr = 986, + ppc_spr_ibr = 986, + ppc_spr_pit = 987, + ppc_spr_esasrr = 988, + ppc_spr_tbhi = 988, + ppc_spr_tblo = 989, + ppc_spr_srr2 = 990, + ppc_spr_sebr = 990, + ppc_spr_srr3 = 991, + ppc_spr_ser = 991, + ppc_spr_hid0 = 1008, + ppc_spr_dbsr = 1008, + ppc_spr_hid1 = 1009, + ppc_spr_iabr = 1010, + ppc_spr_dbcr = 1010, + ppc_spr_iac1 = 1012, + ppc_spr_dabr = 1013, + ppc_spr_iac2 = 1013, + ppc_spr_dac1 = 1014, + ppc_spr_dac2 = 1015, + ppc_spr_l2cr = 1017, + ppc_spr_dccr = 1018, + ppc_spr_ictc = 1019, + ppc_spr_iccr = 1019, + ppc_spr_thrm1 = 1020, + ppc_spr_pbl1 = 1020, + ppc_spr_thrm2 = 1021, + ppc_spr_pbu1 = 1021, + ppc_spr_thrm3 = 1022, + ppc_spr_pbl2 = 1022, + ppc_spr_fpecr = 1022, + ppc_spr_lt = 1022, + ppc_spr_pir = 1023, + ppc_spr_pbu2 = 1023 + }; + #endif