From: Tobias Platen <tplaten@posteo.de>
Date: Wed, 10 Nov 2021 18:20:06 +0000 (+0100)
Subject: add debug output for msr_pr
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=0ea6986c101b88be377c68969a5757076d2c1e40;p=soc.git

add debug output for msr_pr
---

diff --git a/src/soc/experiment/compldst_multi.py b/src/soc/experiment/compldst_multi.py
index 29c07adb..61f0d3cf 100644
--- a/src/soc/experiment/compldst_multi.py
+++ b/src/soc/experiment/compldst_multi.py
@@ -540,6 +540,7 @@ class LDSTCompUnit(RegSpecAPI, Elaboratable):
         comb += addr_ok.eq(self.pi.addr_ok_o)  # no exc, address fine
         # connect MSR.PR for priv/virt operation
         comb += pi.msr_pr.eq(oper_r.msr[MSR.PR])
+        comb += Display("MMUTEST: pi.msr_pr=%i",oper_r.msr[MSR.PR])
 
         # byte-reverse on LD
         revnorev = Signal(64, reset_less=True)