From: Luke Kenneth Casson Leighton Date: Fri, 27 Apr 2018 04:22:06 +0000 (+0100) Subject: whitespace X-Git-Tag: convert-csv-opcode-to-binary~5440 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=0ef56b971364c9fabd43a03912c4e5f48ce85644;p=libreriscv.git whitespace --- diff --git a/harmonised_rvv_rvp.mdwn b/harmonised_rvv_rvp.mdwn index d559c031e..adf17b3f9 100644 --- a/harmonised_rvv_rvp.mdwn +++ b/harmonised_rvv_rvp.mdwn @@ -3,7 +3,7 @@ [[Comparative analysis|harmonised_rvv_rvp/comparative_analysis]] of Harmonised RVP vs Andes Packed SIMD ISA proposal -## MVL, setvl instruction & VL CSR work as per RV Vector spec. +**MVL, setvl instruction & VL CSR work as per RV Vector spec.** ## VLD and VST are supported