From: lkcl <lkcl@web>
Date: Sun, 17 Apr 2022 22:11:56 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~2743
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=0f071ffc3da2e9c2c77c85f4dc82d4edac1fb18e;p=libreriscv.git

---

diff --git a/openpower/isa/svfixedarith.mdwn b/openpower/isa/svfixedarith.mdwn
index 29af1d166..96e272fb0 100644
--- a/openpower/isa/svfixedarith.mdwn
+++ b/openpower/isa/svfixedarith.mdwn
@@ -53,10 +53,11 @@ Special Registers Altered:
 Pseudocode:
 
     <!-- (RS=RT+VL for SVP64, RS=RT+1 for scalar) />
+    <!-- RA both an input and output -->
     cat[0:127] = (RB) || (RS)
-    sum[0:127] = cat + EXTZ(RA) + [1]*128
+    sum[0:127] = cat + EXTZ(RA) - 1
     rhi[0:63] = sum[0:63]
-    if (RA) <= 1 then rhi = rhi + ([0]*63 || 1)
+    if (RA) <= 1 then rhi = rhi + 1
     RA = rhi
     RT = sum[64:127]