From: Luke Kenneth Casson Leighton Date: Sun, 14 Oct 2018 05:23:38 +0000 (+0100) Subject: add rv_ge X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=0f2347c6cad30ac7d3b346b9feaef09fe02bab18;p=riscv-isa-sim.git add rv_ge --- diff --git a/riscv/insns/bge.h b/riscv/insns/bge.h index da0c68e..8cd7e31 100644 --- a/riscv/insns/bge.h +++ b/riscv/insns/bge.h @@ -1,2 +1,2 @@ -if(sreg_t(RS1) >= sreg_t(RS2)) +if(rv_ge(sreg_t(RS1), sreg_t(RS2))) set_pc(BRANCH_TARGET); diff --git a/riscv/insns/bgeu.h b/riscv/insns/bgeu.h index d764a34..a204465 100644 --- a/riscv/insns/bgeu.h +++ b/riscv/insns/bgeu.h @@ -1,2 +1,2 @@ -if(RS1 >= RS2) +if(rv_ge(RS1, RS2)) set_pc(BRANCH_TARGET); diff --git a/riscv/sv_insn_redirect.cc b/riscv/sv_insn_redirect.cc index 012ff0d..f329ebd 100644 --- a/riscv/sv_insn_redirect.cc +++ b/riscv/sv_insn_redirect.cc @@ -297,6 +297,16 @@ sreg_t sv_proc_t::rv_gt(sreg_t lhs, sreg_t rhs) return lhs > rhs; } +reg_t sv_proc_t::rv_ge(reg_t lhs, reg_t rhs) +{ + return lhs >= rhs; +} + +sreg_t sv_proc_t::rv_ge(sreg_t lhs, sreg_t rhs) +{ + return lhs >= rhs; +} + reg_t sv_proc_t::rv_eq(reg_t lhs, reg_t rhs) { return lhs == rhs; diff --git a/riscv/sv_insn_redirect.h b/riscv/sv_insn_redirect.h index d7e44ea..8052013 100644 --- a/riscv/sv_insn_redirect.h +++ b/riscv/sv_insn_redirect.h @@ -110,6 +110,8 @@ public: sreg_t rv_lt(sreg_t lhs, sreg_t rhs); reg_t rv_gt(reg_t lhs, reg_t rhs); sreg_t rv_gt(sreg_t lhs, sreg_t rhs); + reg_t rv_ge(reg_t lhs, reg_t rhs); + sreg_t rv_ge(sreg_t lhs, sreg_t rhs); reg_t rv_eq(reg_t lhs, reg_t rhs); reg_t rv_ne(reg_t lhs, reg_t rhs);