From: Andrew Waterman <waterman@cs.berkeley.edu>
Date: Fri, 20 Nov 2015 03:00:14 +0000 (-0800)
Subject: C.ADDIW is reserved for rd=0
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=0f622f0e89ff62022b59ac0124fcdf8198da020d;p=riscv-isa-sim.git

C.ADDIW is reserved for rd=0
---

diff --git a/riscv/insns/c_jal.h b/riscv/insns/c_jal.h
index 068c441..4f156f6 100644
--- a/riscv/insns/c_jal.h
+++ b/riscv/insns/c_jal.h
@@ -3,6 +3,7 @@ if (xlen == 32) {
   reg_t tmp = npc;
   set_pc(pc + insn.rvc_j_imm());
   WRITE_REG(X_RA, tmp);
-} else {
+} else { // c.addiw
+  require(insn.rvc_rd() != 0);
   WRITE_RD(sext32(RVC_RS1 + insn.rvc_imm()));
 }