From: whitequark Date: Mon, 3 Jun 2019 16:14:59 +0000 (+0000) Subject: vendor.board: extract package. X-Git-Tag: locally_working~204 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=0fa45b5e14e931294751c426b39d79da4a235eec;p=nmigen.git vendor.board: extract package. --- diff --git a/examples/blinky.py b/examples/blinky.py index 3e9cc02..3228163 100644 --- a/examples/blinky.py +++ b/examples/blinky.py @@ -1,5 +1,5 @@ from nmigen import * -from nmigen.vendor.ice40_hx1k_blink_evn import * +from nmigen.vendor.board.ice40_hx1k_blink_evn import * class Blinky(Elaboratable): diff --git a/nmigen/vendor/board/__init__.py b/nmigen/vendor/board/__init__.py new file mode 100644 index 0000000..e69de29 diff --git a/nmigen/vendor/board/ice40_hx1k_blink_evn.py b/nmigen/vendor/board/ice40_hx1k_blink_evn.py new file mode 100644 index 0000000..1039527 --- /dev/null +++ b/nmigen/vendor/board/ice40_hx1k_blink_evn.py @@ -0,0 +1,34 @@ +from ...build import * +from ..fpga.lattice_ice40 import LatticeICE40Platform, IceBurnProgrammerMixin + + +__all__ = ["ICE40HX1KBlinkEVNPlatform"] + + +class ICE40HX1KBlinkEVNPlatform(IceBurnProgrammerMixin, LatticeICE40Platform): + device = "hx1k" + package = "vq100" + clocks = [ + ("clk3p3", 3.3e6), + ] + resources = [ + Resource("clk3p3", 0, Pins("13", dir="i"), + extras={"GLOBAL": "1", "IO_STANDARD": "SB_LVCMOS33"}), + + Resource("user_led", 0, Pins("59", dir="o"), extras={"IO_STANDARD": "SB_LVCMOS33"}), + Resource("user_led", 1, Pins("56", dir="o"), extras={"IO_STANDARD": "SB_LVCMOS33"}), + Resource("user_led", 2, Pins("53", dir="o"), extras={"IO_STANDARD": "SB_LVCMOS33"}), + Resource("user_led", 3, Pins("51", dir="o"), extras={"IO_STANDARD": "SB_LVCMOS33"}), + + Resource("user_btn", 0, Pins("60"), extras={"IO_STANDARD": "SB_LVCMOS33"}), + Resource("user_btn", 1, Pins("57"), extras={"IO_STANDARD": "SB_LVCMOS33"}), + Resource("user_btn", 2, Pins("54"), extras={"IO_STANDARD": "SB_LVCMOS33"}), + Resource("user_btn", 3, Pins("52"), extras={"IO_STANDARD": "SB_LVCMOS33"}), + ] + connectors = [ + Connector("pmod", 1, "10 9 8 7 - - 4 3 2 1 - -"), # J1 + Connector("pmod", 5, "40 42 62 64 - - 37 41 63 45 - -"), # J5 + Connector("pmod", 6, "25 24 21 20 - - 26 27 28 33 - -"), # J6 + Connector("pmod", 11, "49 45 46 48 - -"), # J11 + Connector("pmod", 12, "59 56 53 51 - -"), # J12 + ] diff --git a/nmigen/vendor/board/icestick.py b/nmigen/vendor/board/icestick.py new file mode 100644 index 0000000..0d2ae75 --- /dev/null +++ b/nmigen/vendor/board/icestick.py @@ -0,0 +1,56 @@ +from ...build import * +from ..fpga.lattice_ice40 import LatticeICE40Platform, IceStormProgrammerMixin + + +__all__ = ["ICEStickPlatform"] + + +class ICEStickPlatform(IceStormProgrammerMixin, LatticeICE40Platform): + device = "hx1k" + package = "tq144" + clocks = [ + ("clk12", 12e6), + ] + resources = [ + Resource("clk12", 0, Pins("21", dir="i"), + extras={"GLOBAL": "1", "IO_STANDARD": "SB_LVCMOS33"}), + + Resource("user_led", 0, Pins("99", dir="o"), extras={"IO_STANDARD": "SB_LVCMOS33"}), + Resource("user_led", 1, Pins("98", dir="o"), extras={"IO_STANDARD": "SB_LVCMOS33"}), + Resource("user_led", 2, Pins("97", dir="o"), extras={"IO_STANDARD": "SB_LVCMOS33"}), + Resource("user_led", 3, Pins("96", dir="o"), extras={"IO_STANDARD": "SB_LVCMOS33"}), + Resource("user_led", 4, Pins("95", dir="o"), extras={"IO_STANDARD": "SB_LVCMOS33"}), + + Resource("serial", 0, + Subsignal("rx", Pins("9", dir="i")), + Subsignal("tx", Pins("8", dir="o")), + Subsignal("rts", Pins("7", dir="o")), + Subsignal("cts", Pins("4", dir="i")), + Subsignal("dtr", Pins("3", dir="o")), + Subsignal("dsr", Pins("2", dir="i")), + Subsignal("dcd", Pins("1", dir="i")), + extras={"IO_STANDARD": "SB_LVTTL", "PULLUP": "1"} + ), + + Resource("irda", 0, + Subsignal("rx", Pins("106", dir="i")), + Subsignal("tx", Pins("105", dir="o")), + Subsignal("sd", Pins("107", dir="o")), + extras={"IO_STANDARD": "SB_LVCMOS33"} + ), + + Resource("spiflash", 0, + Subsignal("cs_n", Pins("71", dir="o")), + Subsignal("clk", Pins("70", dir="o")), + Subsignal("mosi", Pins("67", dir="o")), + Subsignal("miso", Pins("68", dir="i")), + extras={"IO_STANDARD": "SB_LVCMOS33"} + ), + ] + connectors = [ + Connector("pmod", 0, "78 79 80 81 - - 87 88 90 91 - -"), # J2 + + Connector("j", 1, "- - 112 113 114 115 116 117 118 119"), # J1 + Connector("j", 3, "- - 62 61 60 56 48 47 45 44"), # J3 + ] + prog_mode = "flash" diff --git a/nmigen/vendor/board/tinyfpga_bx.py b/nmigen/vendor/board/tinyfpga_bx.py new file mode 100644 index 0000000..2c82146 --- /dev/null +++ b/nmigen/vendor/board/tinyfpga_bx.py @@ -0,0 +1,55 @@ +from ...build import * +from ..fpga.lattice_ice40 import LatticeICE40Platform, TinyProgrammerMixin + + +__all__ = ["TinyFPGABXPlatform"] + + +class TinyFPGABXPlatform(TinyProgrammerMixin, LatticeICE40Platform): + device = "lp8k" + package = "cm81" + clocks = [ + ("clk16", 16e6), + ] + resources = [ + Resource("clk16", 0, Pins("B2", dir="i"), + extras={"GLOBAL": 1, "IO_STANDARD": "SB_LVCMOS33"}), + + Resource("user_led", 0, Pins("B3", dir="o"), extras={"IO_STANDARD": "SB_LVCMOS33"}), + + Resource("usb", 0, + Subsignal("d_p", Pins("B4", dir="io")), + Subsignal("d_n", Pins("A4", dir="io")), + Subsignal("pullup", Pins("A3", dir="o")), + extras={"IO_STANDARD": "SB_LVCMOS33"} + ), + + Resource("spiflash", 0, + Subsignal("cs_n", Pins("F7", dir="o")), + Subsignal("clk", Pins("G7", dir="o")), + Subsignal("mosi", Pins("G6", dir="o")), + Subsignal("miso", Pins("H7", dir="i")), + Subsignal("wp", Pins("H4", dir="o")), + Subsignal("hold", Pins("J8", dir="o")), + extras={"IO_STANDARD": "SB_LVCMOS33"} + ), + + Resource("spiflash4x", 0, + Subsignal("cs_n", Pins("F7", dir="o")), + Subsignal("clk", Pins("G7", dir="o")), + Subsignal("dq", Pins("G6 H7 H4 J8", dir="io")), + extras={"IO_STANDARD": "SB_LVCMOS33"} + ), + ] + connectors = [ + Connector("gpio", 0, + # Left side of the board + # 1 2 3 4 5 6 7 8 9 10 11 12 13 + " A2 A1 B1 C2 C1 D2 D1 E2 E1 G2 H1 J1 H2" + # Right side of the board + # 14 15 16 17 18 19 20 21 22 23 24 + " H9 D9 D8 B8 A9 B8 A8 B7 A7 B6 A6" + # Bottom of the board + # 25 26 27 28 29 30 31 + "G1 J3 J4 G9 J9 E8 J2"), + ] diff --git a/nmigen/vendor/ice40_hx1k_blink_evn.py b/nmigen/vendor/ice40_hx1k_blink_evn.py deleted file mode 100644 index 9e2759d..0000000 --- a/nmigen/vendor/ice40_hx1k_blink_evn.py +++ /dev/null @@ -1,34 +0,0 @@ -from ..build import * -from .fpga.lattice_ice40 import LatticeICE40Platform, IceBurnProgrammerMixin - - -__all__ = ["ICE40HX1KBlinkEVNPlatform"] - - -class ICE40HX1KBlinkEVNPlatform(IceBurnProgrammerMixin, LatticeICE40Platform): - device = "hx1k" - package = "vq100" - clocks = [ - ("clk3p3", 3.3e6), - ] - resources = [ - Resource("clk3p3", 0, Pins("13", dir="i"), - extras={"GLOBAL": "1", "IO_STANDARD": "SB_LVCMOS33"}), - - Resource("user_led", 0, Pins("59", dir="o"), extras={"IO_STANDARD": "SB_LVCMOS33"}), - Resource("user_led", 1, Pins("56", dir="o"), extras={"IO_STANDARD": "SB_LVCMOS33"}), - Resource("user_led", 2, Pins("53", dir="o"), extras={"IO_STANDARD": "SB_LVCMOS33"}), - Resource("user_led", 3, Pins("51", dir="o"), extras={"IO_STANDARD": "SB_LVCMOS33"}), - - Resource("user_btn", 0, Pins("60"), extras={"IO_STANDARD": "SB_LVCMOS33"}), - Resource("user_btn", 1, Pins("57"), extras={"IO_STANDARD": "SB_LVCMOS33"}), - Resource("user_btn", 2, Pins("54"), extras={"IO_STANDARD": "SB_LVCMOS33"}), - Resource("user_btn", 3, Pins("52"), extras={"IO_STANDARD": "SB_LVCMOS33"}), - ] - connectors = [ - Connector("pmod", 1, "10 9 8 7 - - 4 3 2 1 - -"), # J1 - Connector("pmod", 5, "40 42 62 64 - - 37 41 63 45 - -"), # J5 - Connector("pmod", 6, "25 24 21 20 - - 26 27 28 33 - -"), # J6 - Connector("pmod", 11, "49 45 46 48 - -"), # J11 - Connector("pmod", 12, "59 56 53 51 - -"), # J12 - ] diff --git a/nmigen/vendor/icestick.py b/nmigen/vendor/icestick.py deleted file mode 100644 index 917a363..0000000 --- a/nmigen/vendor/icestick.py +++ /dev/null @@ -1,56 +0,0 @@ -from ..build import * -from .fpga.lattice_ice40 import LatticeICE40Platform, IceStormProgrammerMixin - - -__all__ = ["ICEStickPlatform"] - - -class ICEStickPlatform(IceStormProgrammerMixin, LatticeICE40Platform): - device = "hx1k" - package = "tq144" - clocks = [ - ("clk12", 12e6), - ] - resources = [ - Resource("clk12", 0, Pins("21", dir="i"), - extras={"GLOBAL": "1", "IO_STANDARD": "SB_LVCMOS33"}), - - Resource("user_led", 0, Pins("99", dir="o"), extras={"IO_STANDARD": "SB_LVCMOS33"}), - Resource("user_led", 1, Pins("98", dir="o"), extras={"IO_STANDARD": "SB_LVCMOS33"}), - Resource("user_led", 2, Pins("97", dir="o"), extras={"IO_STANDARD": "SB_LVCMOS33"}), - Resource("user_led", 3, Pins("96", dir="o"), extras={"IO_STANDARD": "SB_LVCMOS33"}), - Resource("user_led", 4, Pins("95", dir="o"), extras={"IO_STANDARD": "SB_LVCMOS33"}), - - Resource("serial", 0, - Subsignal("rx", Pins("9", dir="i")), - Subsignal("tx", Pins("8", dir="o")), - Subsignal("rts", Pins("7", dir="o")), - Subsignal("cts", Pins("4", dir="i")), - Subsignal("dtr", Pins("3", dir="o")), - Subsignal("dsr", Pins("2", dir="i")), - Subsignal("dcd", Pins("1", dir="i")), - extras={"IO_STANDARD": "SB_LVTTL", "PULLUP": "1"} - ), - - Resource("irda", 0, - Subsignal("rx", Pins("106", dir="i")), - Subsignal("tx", Pins("105", dir="o")), - Subsignal("sd", Pins("107", dir="o")), - extras={"IO_STANDARD": "SB_LVCMOS33"} - ), - - Resource("spiflash", 0, - Subsignal("cs_n", Pins("71", dir="o")), - Subsignal("clk", Pins("70", dir="o")), - Subsignal("mosi", Pins("67", dir="o")), - Subsignal("miso", Pins("68", dir="i")), - extras={"IO_STANDARD": "SB_LVCMOS33"} - ), - ] - connectors = [ - Connector("pmod", 0, "78 79 80 81 - - 87 88 90 91 - -"), # J2 - - Connector("j", 1, "- - 112 113 114 115 116 117 118 119"), # J1 - Connector("j", 3, "- - 62 61 60 56 48 47 45 44"), # J3 - ] - prog_mode = "flash" diff --git a/nmigen/vendor/tinyfpga_bx.py b/nmigen/vendor/tinyfpga_bx.py deleted file mode 100644 index bc66841..0000000 --- a/nmigen/vendor/tinyfpga_bx.py +++ /dev/null @@ -1,55 +0,0 @@ -from ..build import * -from .fpga.lattice_ice40 import LatticeICE40Platform, TinyProgrammerMixin - - -__all__ = ["TinyFPGABXPlatform"] - - -class TinyFPGABXPlatform(TinyProgrammerMixin, LatticeICE40Platform): - device = "lp8k" - package = "cm81" - clocks = [ - ("clk16", 16e6), - ] - resources = [ - Resource("clk16", 0, Pins("B2", dir="i"), - extras={"GLOBAL": 1, "IO_STANDARD": "SB_LVCMOS33"}), - - Resource("user_led", 0, Pins("B3", dir="o"), extras={"IO_STANDARD": "SB_LVCMOS33"}), - - Resource("usb", 0, - Subsignal("d_p", Pins("B4", dir="io")), - Subsignal("d_n", Pins("A4", dir="io")), - Subsignal("pullup", Pins("A3", dir="o")), - extras={"IO_STANDARD": "SB_LVCMOS33"} - ), - - Resource("spiflash", 0, - Subsignal("cs_n", Pins("F7", dir="o")), - Subsignal("clk", Pins("G7", dir="o")), - Subsignal("mosi", Pins("G6", dir="o")), - Subsignal("miso", Pins("H7", dir="i")), - Subsignal("wp", Pins("H4", dir="o")), - Subsignal("hold", Pins("J8", dir="o")), - extras={"IO_STANDARD": "SB_LVCMOS33"} - ), - - Resource("spiflash4x", 0, - Subsignal("cs_n", Pins("F7", dir="o")), - Subsignal("clk", Pins("G7", dir="o")), - Subsignal("dq", Pins("G6 H7 H4 J8", dir="io")), - extras={"IO_STANDARD": "SB_LVCMOS33"} - ), - ] - connectors = [ - Connector("gpio", 0, - # Left side of the board - # 1 2 3 4 5 6 7 8 9 10 11 12 13 - " A2 A1 B1 C2 C1 D2 D1 E2 E1 G2 H1 J1 H2" - # Right side of the board - # 14 15 16 17 18 19 20 21 22 23 24 - " H9 D9 D8 B8 A9 B8 A8 B7 A7 B6 A6" - # Bottom of the board - # 25 26 27 28 29 30 31 - "G1 J3 J4 G9 J9 E8 J2"), - ]