From: Dmitry Selyutin Date: Wed, 31 May 2023 21:04:13 +0000 (+0300) Subject: power_insn: forbid r0 for RA0 and RT0 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=0fb1a8383152c4eb080cb84bc6c161c7e599da8d;p=openpower-isa.git power_insn: forbid r0 for RA0 and RT0 --- diff --git a/src/openpower/decoder/power_insn.py b/src/openpower/decoder/power_insn.py index f93037dd..d480a3f3 100644 --- a/src/openpower/decoder/power_insn.py +++ b/src/openpower/decoder/power_insn.py @@ -1264,6 +1264,8 @@ class ExtendableOperand(DynamicOperand): value = value[1:] vector = True if value.startswith(prefix): + if (self.extra_reg.or_zero and (value == f"{prefix}0")): + raise ValueError(value) value = value[len(prefix):] value = int(value, 0)