From: Marek Olšák Date: Wed, 7 Sep 2016 10:35:40 +0000 (+0200) Subject: radeonsi: unify si_set_optimal_micro_tile_mode call sites X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=0fbaf749779b5ac6d242c2b6745c20be98567499;p=mesa.git radeonsi: unify si_set_optimal_micro_tile_mode call sites There is nothing special happening in those code blocks. Reviewed-by: Bas Nieuwenhuizen Reviewed-by: Nicolai Hähnle --- diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c index e4525889e66..41fd94b2437 100644 --- a/src/gallium/drivers/radeon/r600_texture.c +++ b/src/gallium/drivers/radeon/r600_texture.c @@ -2503,10 +2503,6 @@ void evergreen_do_fast_color_clear(struct r600_common_context *rctx, if (rctx->screen->debug_flags & DBG_NO_DCC_CLEAR) continue; - /* We can change the micro tile mode before a full clear. */ - if (rctx->screen->chip_class >= SI) - si_set_optimal_micro_tile_mode(rctx->screen, tex); - if (!vi_get_fast_clear_parameters(fb->cbufs[i]->format, color, &reset_value, &clear_words_needed)) @@ -2533,10 +2529,6 @@ void evergreen_do_fast_color_clear(struct r600_common_context *rctx, continue; } - /* We can change the micro tile mode before a full clear. */ - if (rctx->screen->chip_class >= SI) - si_set_optimal_micro_tile_mode(rctx->screen, tex); - /* Do the fast clear. */ rctx->clear_buffer(&rctx->b, &tex->cmask_buffer->b.b, tex->cmask.offset, tex->cmask.size, 0, @@ -2545,6 +2537,10 @@ void evergreen_do_fast_color_clear(struct r600_common_context *rctx, tex->dirty_level_mask |= 1 << fb->cbufs[i]->u.tex.level; } + /* We can change the micro tile mode before a full clear. */ + if (rctx->screen->chip_class >= SI) + si_set_optimal_micro_tile_mode(rctx->screen, tex); + evergreen_set_clear_color(tex, fb->cbufs[i]->format, color); if (dirty_cbufs)