From: lkcl <lkcl@web>
Date: Sat, 20 Mar 2021 09:39:37 +0000 (+0000)
Subject: (no commit message)
X-Git-Tag: DRAFT_SVP64_0_1~1169
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=0fc226fe5952c5dd9e7358978aef316545e6478a;p=libreriscv.git

---

diff --git a/openpower/sv/av_opcodes.mdwn b/openpower/sv/av_opcodes.mdwn
index cb264e10d..b8fed4e21 100644
--- a/openpower/sv/av_opcodes.mdwn
+++ b/openpower/sv/av_opcodes.mdwn
@@ -22,7 +22,7 @@ In-advance, the summary of base scalar operations that need to be added is:
 | signed max   | result = (src1 > src2) ? src1 : src2  |
 | bitwise sel  | (a ? b : c) - use bitmanip ternary |
 
-All other capabilities (saturate in particular) are achieved with [[sv/svp64]] modes and swizzle.
+All other capabilities (saturate in particular) are achieved with [[sv/svp64]] modes and swizzle.  Note that unsigned integer minmax is added in bitmanip.
 
 # Audio