From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Wed, 4 Jul 2018 13:36:38 +0000 (+0100)
Subject: remove extraneous clock cycle
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=0fca41253f88dbf11dbdfe587b11a55ce89831de;p=pinmux.git

remove extraneous clock cycle
---

diff --git a/src/test_bsv/tests/test_pinmux.py b/src/test_bsv/tests/test_pinmux.py
index 8cf5065..52b0add 100644
--- a/src/test_bsv/tests/test_pinmux.py
+++ b/src/test_bsv/tests/test_pinmux.py
@@ -100,8 +100,6 @@ def pinmux_uart(dut):
     dut.EN_mux_lines_cell1_mux = 0
     dut.EN_mux_lines_cell2_mux = 0
 
-    yield Timer(2)
-
     # UART
     yield Timer(2)
     dut.peripheral_side_uart_tx_in = 1