From: Alan Modra Date: Tue, 27 Mar 2007 08:36:27 +0000 (+0000) Subject: * ld-spu/spu.exp (embed_test): New. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=0fd7d34280f0114377d1f94253d813b7360ad44e;p=binutils-gdb.git * ld-spu/spu.exp (embed_test): New. * ld-spu/ear.s: New. * ld-spu/ear.d: New. * ld-spu/embed.rd: New. * ld-spu/ovl2.s: New. * ld-spu/ovl2.d: New. --- diff --git a/ld/testsuite/ChangeLog b/ld/testsuite/ChangeLog index dfcd3ea5c3e..8bce5fe98d0 100644 --- a/ld/testsuite/ChangeLog +++ b/ld/testsuite/ChangeLog @@ -1,3 +1,12 @@ +2007-03-27 Alan Modra + + * ld-spu/spu.exp (embed_test): New. + * ld-spu/ear.s: New. + * ld-spu/ear.d: New. + * ld-spu/embed.rd: New. + * ld-spu/ovl2.s: New. + * ld-spu/ovl2.d: New. + 2007-03-24 Alan Modra * ld-elf/overlay.d: -u symbols we want to see in the output. diff --git a/ld/testsuite/ld-spu/ear.d b/ld/testsuite/ld-spu/ear.d new file mode 100644 index 00000000000..df5546fb60f --- /dev/null +++ b/ld/testsuite/ld-spu/ear.d @@ -0,0 +1,30 @@ +#as: +#objdump: -Dr +#name: ear + +.*: +file format .* + +Disassembly of section \.text: + +0+00 <_start>: + 0: 32 00 00 00 br 0 + 0: SPU_REL16 _start + +Disassembly of section \.data: + +0+00 <_EAR_main>: + \.\.\. + +0+20 <_EAR_foo>: + \.\.\. +Disassembly of section \.toe: + +0+00 <_EAR_>: + \.\.\. + +0+10 <_EAR_bar>: + \.\.\. +Disassembly of section \.data\.blah: + +0+00 <_EAR_blah>: + \.\.\. diff --git a/ld/testsuite/ld-spu/ear.s b/ld/testsuite/ld-spu/ear.s new file mode 100644 index 00000000000..ba0be05c650 --- /dev/null +++ b/ld/testsuite/ld-spu/ear.s @@ -0,0 +1,25 @@ + .text + .global _start +_start: + br _start + +#test old-style toe _EAR_ syms + .section .toe,"a",@nobits +_EAR_: + .space 16 +_EAR_bar: + .space 16 + +#test new-style _EAR_ syms + .data +_EAR_main: + .space 16 + +#new ones don't need to be 16 bytes apart + .space 16 +_EAR_foo: + .space 16 + + .section .data.blah,"aw",@progbits +_EAR_blah: + .space 16 diff --git a/ld/testsuite/ld-spu/embed.rd b/ld/testsuite/ld-spu/embed.rd new file mode 100644 index 00000000000..0ac34da8ce0 --- /dev/null +++ b/ld/testsuite/ld-spu/embed.rd @@ -0,0 +1,16 @@ + +Relocation section '\.rela\.rodata\.speelf' at .* contains 3 entries: + Offset Info Type Sym\. Value Symbol's Name \+ Addend +00000184 00000601 R_PPC_ADDR32 00000000 main \+ 0 +000001a4 00000901 R_PPC_ADDR32 00000000 foo \+ 0 +000001b4 00000701 R_PPC_ADDR32 00000000 blah \+ 0 + +Relocation section '\.rela\.data' at .* contains 2 entries: + Offset Info Type Sym\. Value Symbol's Name \+ Addend +00000004 00000201 R_PPC_ADDR32 00000000 \.rodata\.speelf \+ 0 +00000008 00000401 R_PPC_ADDR32 00000000 \.data\.spetoe \+ 0 + +Relocation section '\.rela\.data\.spetoe' at .* contains 2 entries: + Offset Info Type Sym\. Value Symbol's Name \+ Addend +00000004 00000201 R_PPC_ADDR32 00000000 \.rodata\.speelf \+ 0 +00000014 00000a01 R_PPC_ADDR32 00000000 bar \+ 0 diff --git a/ld/testsuite/ld-spu/ovl2.d b/ld/testsuite/ld-spu/ovl2.d new file mode 100644 index 00000000000..ea2644bbac4 --- /dev/null +++ b/ld/testsuite/ld-spu/ovl2.d @@ -0,0 +1,81 @@ +#source: ovl2.s +#ld: -N -T ovl.lnk --emit-relocs +#objdump: -D -r + +.*elf32-spu + +Disassembly of section \.text: + +00000100 <_start>: + 100: 33 00 06 00 brsl \$0,130 <00000000\.ovl_call\.f1_a1> # 130 + 100: SPU_REL16 f1_a1 + 104: 33 00 03 80 brsl \$0,120 <00000000\.ovl_call\.10:4> # 120 + 104: SPU_REL16 setjmp + 108: 32 7f ff 00 br 100 <_start> # 100 + 108: SPU_REL16 _start + +0000010c : + 10c: 35 00 00 00 bi \$0 + +00000110 : + 110: 35 00 00 00 bi \$0 + ... + +00000120 <00000000\.ovl_call.10:4>: + 120: 42 00 86 4f ila \$79,268 # 10c + 124: 40 20 00 00 nop \$0 + 128: 42 00 00 4e ila \$78,0 + 12c: 32 00 0a 80 br 180 <__ovly_load> # 180 + +00000130 <00000000\.ovl_call.f1_a1>: + 130: 42 02 00 4f ila \$79,1024 # 400 + 134: 40 20 00 00 nop \$0 + 138: 42 00 00 ce ila \$78,1 + 13c: 32 00 08 80 br 180 <__ovly_load> # 180 + +00000140 <00000000\.ovl_call\._SPUEAR_f1_a2>: + 140: 42 02 00 4f ila \$79,1024 # 400 + 144: 40 20 00 00 nop \$0 + 148: 42 00 01 4e ila \$78,2 + 14c: 32 00 06 80 br 180 <__ovly_load> # 180 +#... +Disassembly of section \.ov_a1: + +00000400 : + 400: 35 00 00 00 bi \$0 + \.\.\. +Disassembly of section \.ov_a2: + +00000400 <_SPUEAR_f1_a2>: + 400: 32 7f a2 00 br 110 # 110 + 400: SPU_REL16 longjmp + \.\.\. +Disassembly of section \.data: + +00000410 <_ovly_table>: + 410: 00 00 04 00 .* + 414: 00 00 00 10 .* + 418: 00 00 02 c0 .* + 41c: 00 00 00 01 .* + 420: 00 00 04 00 .* + 424: 00 00 00 10 .* + 428: 00 00 02 d0 .* + 42c: 00 00 00 01 .* + +00000430 <_ovly_buf_table>: + 430: 00 00 00 00 .* +Disassembly of section \.toe: + +00000440 <_EAR_>: + \.\.\. +Disassembly of section \.note\.spu_name: + +.* <\.note\.spu_name>: +.*: 00 00 00 08 .* +.*: 00 00 00 0c .* +.*: 00 00 00 01 .* +.*: 53 50 55 4e .* +.*: 41 4d 45 00 .* +.*: 74 6d 70 64 .* +.*: 69 72 2f 64 .* +.*: 75 6d 70 00 .* diff --git a/ld/testsuite/ld-spu/ovl2.s b/ld/testsuite/ld-spu/ovl2.s new file mode 100644 index 00000000000..a3443f51ee9 --- /dev/null +++ b/ld/testsuite/ld-spu/ovl2.s @@ -0,0 +1,35 @@ + .text + .p2align 2 + .global _start +_start: + brsl lr,f1_a1 + brsl lr,setjmp + br _start + + .type setjmp,@function +setjmp: + bi lr + .size setjmp,.-setjmp + + .type longjmp,@function +longjmp: + bi lr + .size longjmp,.-longjmp + + .section .ov_a1,"ax",@progbits + .p2align 2 + .global f1_a1 + .type f1_a1,@function +f1_a1: + bi lr + .size f1_a1,.-f1_a1 + + .section .ov_a2,"ax",@progbits + .p2align 2 + .type f1_a2,@function +f1_a2: + br longjmp + .size f1_a2,.-f1_a2 + +_SPUEAR_f1_a2 = f1_a2 + .global _SPUEAR_f1_a2 diff --git a/ld/testsuite/ld-spu/spu.exp b/ld/testsuite/ld-spu/spu.exp index e538f59ad0b..cb6f0dd6398 100644 --- a/ld/testsuite/ld-spu/spu.exp +++ b/ld/testsuite/ld-spu/spu.exp @@ -20,8 +20,72 @@ if { ![istarget "spu-*-*"] } { return } +proc embed_test { } { + global subdir srcdir + global AS ASFLAGS LD LDFLAGS READELF READELFFLAGS + + set cmd "$AS $ASFLAGS -o tmpdir/ear.o $srcdir/$subdir/ear.s" + send_log "$cmd\n" + set cmdret [catch "exec $cmd" comp_output] + set comp_output [prune_warnings $comp_output] + if { $cmdret != 0 || $comp_output != ""} then { + send_log "$comp_output\n" + verbose "$comp_output" 3 + fail "ear assembly" + return + } + + set cmd "$LD $LDFLAGS -o tmpdir/ear tmpdir/ear.o" + send_log "$cmd\n" + set cmdret [catch "exec $cmd" comp_output] + set comp_output [prune_warnings $comp_output] + if { $cmdret != 0 || $comp_output != ""} then { + send_log "$comp_output\n" + verbose "$comp_output" 3 + fail "ear link" + return + } + + set cmd "sh $srcdir/../../binutils/embedspu.sh -m32 ear tmpdir/ear tmpdir/embed.o" + send_log "$cmd\n" + set cmdret [catch "exec $cmd" comp_output] + set comp_output [prune_warnings $comp_output] + if { $cmdret != 0 || $comp_output != ""} then { + send_log "$comp_output\n" + verbose "$comp_output" 3 + if { [regexp "unknown pseudo-op: `.reloc'" $comp_output] } { + untested "ear embedspu" + return + } + fail "ear embedspu" + return + } + + set cmd "$READELF $READELFFLAGS -r --wide tmpdir/embed.o > tmpdir/embed.out" + send_log "$cmd\n" + set cmdret [catch "exec $cmd" comp_output] + set comp_output [prune_warnings $comp_output] + if { $cmdret != 0 || $comp_output != ""} then { + send_log "$comp_output\n" + verbose "$comp_output" 3 + fail "ear embed readelf" + return + } + + if { [regexp_diff "tmpdir/embed.out" $srcdir/$subdir/embed.rd] } then { + fail "ear embed output" + return + } + + pass "ear embed" +} + set rd_test_list [lsort [glob -nocomplain $srcdir/$subdir/*.d]] foreach sputest $rd_test_list { verbose [file rootname $sputest] run_dump_test [file rootname $sputest] } + +if { [isbuild "powerpc*-*-linux*"] } { + embed_test +}