From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Sat, 20 Feb 2021 12:10:11 +0000 (+0000)
Subject: minor whitespace cleanup
X-Git-Tag: convert-csv-opcode-to-binary~208
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=100445d1bf0ed0b15e618081a2627d788e89a3d2;p=soc.git

minor whitespace cleanup
---

diff --git a/src/soc/fu/mmu/test/test_issuer_mmu_rom.py b/src/soc/fu/mmu/test/test_issuer_mmu_rom.py
index ed71bf43..337a92e1 100644
--- a/src/soc/fu/mmu/test/test_issuer_mmu_rom.py
+++ b/src/soc/fu/mmu/test/test_issuer_mmu_rom.py
@@ -4,12 +4,14 @@ from soc.simulator.program import Program
 from soc.config.endian import bigendian
 import unittest
 
-from soc.fu.test.common import (
-    TestAccumulatorBase, skip_case, TestCase, ALUHelpers)
+from soc.fu.test.common import (TestAccumulatorBase, skip_case, TestCase,
+                                ALUHelpers)
 
 def b(x):
     return int.from_bytes(x.to_bytes(8, byteorder='little'),
                           byteorder='big', signed=False)
+
+
 default_mem = { 0x10000:    # PARTITION_TABLE_2
                        # PATB_GR=1 PRTB=0x1000 PRTS=0xb
                 b(0x800000000100000b),
@@ -49,6 +51,8 @@ class MMUTestCase(TestAccumulatorBase):
         initial_sprs = {}
         self.add_case(Program(lst, bigendian),
                       initial_regs, initial_sprs)
+
+
 class RomDBG():
     def __init__(self):
         self.rom = default_mem