From: Dominik Vogt <vogt@linux.vnet.ibm.com>
Date: Fri, 18 Dec 2015 10:36:57 +0000 (+0000)
Subject: S/390: Allow to use r2 to r4 as literal pool base.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=10148d74d8138f12423160893b4100cf7b034896;p=gcc.git

S/390: Allow to use r2 to r4 as literal pool base.

gcc/ChangeLog

	* config/s390/s390.c (s390_init_frame_layout): Try r4 to r2 for the
	literal pool pointer.

gcc/testsuite/ChangeLog

	* gcc.target/s390/litpool-r3-1.c: New test.

From-SVN: r231813
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index aab0e3abb3d..802c8b8fd76 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2015-12-18  Dominik Vogt  <vogt@linux.vnet.ibm.com>
+
+	* config/s390/s390.c (s390_init_frame_layout): Try r4 to r2 for the
+	literal pool pointer.
+
 2015-12-18  Yuri Rumyantsev  <ysrumyan@gmail.com>
 
 	PR tree-optimization/68906
diff --git a/gcc/config/s390/s390.c b/gcc/config/s390/s390.c
index ed684af1a66..cba88bbb0fc 100644
--- a/gcc/config/s390/s390.c
+++ b/gcc/config/s390/s390.c
@@ -9584,10 +9584,17 @@ s390_init_frame_layout (void)
 	 as base register to avoid save/restore overhead.  */
       if (!base_used)
 	cfun->machine->base_reg = NULL_RTX;
-      else if (crtl->is_leaf && !df_regs_ever_live_p (5))
-	cfun->machine->base_reg = gen_rtx_REG (Pmode, 5);
       else
-	cfun->machine->base_reg = gen_rtx_REG (Pmode, BASE_REGNUM);
+	{
+	  int br = 0;
+
+	  if (crtl->is_leaf)
+	    /* Prefer r5 (most likely to be free).  */
+	    for (br = 5; br >= 2 && df_regs_ever_live_p (br); br--)
+	      ;
+	  cfun->machine->base_reg =
+	    gen_rtx_REG (Pmode, (br > 0) ? br : BASE_REGNUM);
+	}
 
       s390_register_info ();
       s390_frame_info ();
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index eee04341709..3053736ace6 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,7 @@
+2015-12-18  Dominik Vogt  <vogt@linux.vnet.ibm.com>
+
+	* gcc.target/s390/litpool-r3-1.c: New test.
+
 2015-12-18  Yuri Rumyantsev  <ysrumyan@gmail.com>
 
 	PR tree-optimization/68906
diff --git a/gcc/testsuite/gcc.target/s390/litpool-r3-1.c b/gcc/testsuite/gcc.target/s390/litpool-r3-1.c
new file mode 100644
index 00000000000..8ee50cf435a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/s390/litpool-r3-1.c
@@ -0,0 +1,16 @@
+/* Validate that r3 may be used as the literal pool pointer.  Test that only on
+   64-bit for z900 to simplify the test.  It's not really different on 31-bit
+   or other cpus.  */
+
+/* { dg-do compile { target { lp64 } } } */
+/* { dg-options "-march=z900 -O2" } */
+
+__int128 gi;
+const int c = 0x12345678u;
+int foo(void)
+{
+	gi += c;
+	return c;
+}
+
+/* { dg-final { scan-assembler-times "\tlarl\t%r3,.L3" 1 } } */