From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Sun, 7 Jun 2020 14:27:38 +0000 (+0100)
Subject: ha! set XER CA/CA32 in simulator from output.value, not using eq
X-Git-Tag: div_pipeline~497
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=1104f25fceaef7d5c0375323d3fa0b252ffa34f5;p=soc.git

ha! set XER CA/CA32 in simulator from output.value, not using eq
---

diff --git a/src/soc/decoder/isa/caller.py b/src/soc/decoder/isa/caller.py
index 63b2cf0a..83f07be0 100644
--- a/src/soc/decoder/isa/caller.py
+++ b/src/soc/decoder/isa/caller.py
@@ -374,7 +374,7 @@ class ISACaller:
                 if name in ['CA', 'CA32']:
                     if carry_en:
                         print ("writing %s to XER" % name, output)
-                        self.spr['XER'][XER_bits[name]].eq(output)
+                        self.spr['XER'][XER_bits[name]] = output.value
                     else:
                         print ("NOT writing %s to XER" % name, output)
                 elif name in info.special_regs: