From: lkcl <lkcl@web>
Date: Wed, 8 Sep 2021 13:58:28 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: DRAFT_SVP64_0_1~177
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=114e8643e8b5e0ef2fd2b9e3e2ff49c1202c4e9d;p=libreriscv.git

---

diff --git a/openpower/sv/cr_ops.mdwn b/openpower/sv/cr_ops.mdwn
index f0293f43d..a3e3c7a89 100644
--- a/openpower/sv/cr_ops.mdwn
+++ b/openpower/sv/cr_ops.mdwn
@@ -105,7 +105,9 @@ Examples of the former type:
 * crand, cror, crnor. These all are 5-bit (BA, BB, BT). The bit
   to be tested against `inv` is the one selected by `BT`
 * mcrf. This has only 3-bit (BF, BFA). In order to select the
-  bit to be tested, the alternative FFirst encoding must be used.
+  bit to be tested, the alternative encoding must be used.
+  With `CRbit` coming from the SVP64 RM bits 22-23 the bit
+  of BF to be tested is identified.
 
 This limits sv.mcrf in that it may not use the `VLi` (VL inclusive)
 Mode. This is unfortunste but unavoidable due to encoding pressure