From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Sun, 18 Feb 2024 18:57:45 +0000 (+0000)
Subject: bug 1155: add svshape4, SVI2-Form, and fields for SVI2
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=116a6cfd34b1ec677a0c9f9fa61576e8124d2cda;p=openpower-isa.git

bug 1155: add svshape4, SVI2-Form, and fields for SVI2
---

diff --git a/openpower/isa/simplev.mdwn b/openpower/isa/simplev.mdwn
index 33a02e66..14cb10a2 100644
--- a/openpower/isa/simplev.mdwn
+++ b/openpower/isa/simplev.mdwn
@@ -475,3 +475,33 @@ Special Registers Altered:
 
     None
 
+# svshape4
+
+SVI2-Form
+
+* svshape4 SVxd,SVyd,SVo,SVyx,sk,sm2,sm,si
+
+Pseudo-code:
+
+    # set up template, then copy once location identified
+    shape <- [0]*32
+    shape[30:31] <- 0b11          # triangle/bigmul mode
+    shape[28:29] <- sm            # mode
+    shape[24:27] <- SVo           # offset
+    shape[23]    <- SVyx          # swap x/y priority
+    shape[22]    <- sk            # skipping
+    shape[19:20] <- sm2           # submode2
+    shape[18]    <- 0             # reserved
+    shape[12:17] <- 1             # zdim
+    shape[6:11]  <- (0b0 || SVyd) # xdim
+    shape[0:5]   <- (0b0 || SVxd) # xdim
+    # activate requested shape
+    if si = 0 then SVSHAPE0 <- shape
+    if si = 1 then SVSHAPE1 <- shape
+    if si = 2 then SVSHAPE2 <- shape
+    if si = 3 then SVSHAPE3 <- shape
+
+Special Registers Altered:
+
+    None
+
diff --git a/openpower/isatables/fields.text b/openpower/isatables/fields.text
index 1edbb6a5..cc9ee0a1 100644
--- a/openpower/isatables/fields.text
+++ b/openpower/isatables/fields.text
@@ -303,6 +303,11 @@
     |0     |6    |11    |16   |21 |23  |24|25|26    31|
     | PO   |  SVG|rmm   | SVd |ew |SVyx|mm|sk|   XO   |
 
+# 1.6.29.1 SVI2-FORM
+
+    |0     |6   |9   |11  |16  |21 |22  |24 |26  |27 31|
+    |PO    |SVo |si  |SVyd|SVxd|sk |sm2 |sm |SVyx|XO   |
+
 # 1.6.30 SVL-FORM
     |0     |6    |11    |16   |23 |24 |25 |26    |31 |
     | PO   |  RT |   RA | SVi |ms |vs |vf |   XO |Rc |
@@ -875,6 +880,9 @@
          Immediate field used to specify a 16-bit signed
          integer.
          Formats: D
+    si (9:10)
+        Field used to specify SVSHAPE0-3 to be set
+        Formats: SVI2
     SIM (11:15)
          Immediate field used to specify a 5-bit signed inte-
          ger.
@@ -882,6 +890,12 @@
     sk (25)
         Field used to specify dimensional skipping in svindex
         Formats: SVI, SVM2
+    sm (24:25)
+        submode for svindex4
+        Formats: SVI2
+    sm2 (22:23)
+        submode2 for svindex4
+        Formats: SVI2
     SP (11:12)
          Immediate field that specifies signed versus
          unsigned conversion.
@@ -924,16 +938,16 @@
          Formats: SVRM
     SVo (6:9)
         Field used by the svshape2 instruction as an offset
-        Formats: SVM2
+        Formats: SVM2, SVI2
     SVrm (21:24)
          Simple-V "REMAP" Mode
          Formats: SVM
     SVxd (6:10)
          Simple-V "REMAP" x-dimension size
-         Formats: SVM
+         Formats: SVM, SVI2
     SVyd (11:15)
          Simple-V "REMAP" y-dimension size
-         Formats: SVM
+         Formats: SVM, SVI2
     SVzd (16:20)
          Simple-V "REMAP" z-dimension size
          Formats: SVM
@@ -1099,7 +1113,7 @@
         Formats: MDS
     XO (27:31)
         Extended opcode field.
-        Formats: BM2
+        Formats: BM2, SVI2
     XO (29:31)
         Extended opcode field.
         Formats: DQ
diff --git a/src/openpower/decoder/power_enums.py b/src/openpower/decoder/power_enums.py
index 2d144176..56272546 100644
--- a/src/openpower/decoder/power_enums.py
+++ b/src/openpower/decoder/power_enums.py
@@ -178,6 +178,7 @@ class Form(Enum):
     CW = 44
     CW2 = 45
     DCT = 46 # fdmadds
+    SVI2 = 47 # bigmul REMAP
 
 # Simple-V svp64 fields https://libre-soc.org/openpower/sv/svp64/