From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Thu, 21 Mar 2019 19:57:18 +0000 (+0000)
Subject: reorganise FPAddAlignSingleAdd
X-Git-Tag: ls180-24jan2020~1556
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=1173f5af1eabe8fb65db6e5b0f0c4da1546df633;p=ieee754fpu.git

reorganise FPAddAlignSingleAdd
---

diff --git a/src/add/nmigen_add_experiment.py b/src/add/nmigen_add_experiment.py
index 813279c9..a14ad01d 100644
--- a/src/add/nmigen_add_experiment.py
+++ b/src/add/nmigen_add_experiment.py
@@ -713,12 +713,11 @@ class FPAddAlignSingleAdd(FPState, FPID):
     def __init__(self, width, id_wid):
         FPState.__init__(self, "align")
         FPID.__init__(self, id_wid)
+        self.width = width
+        self.id_wid = id_wid
         self.mod = FPAddAlignSingleMod(width, id_wid)
         self.o = self.mod.ospec()
 
-        self.a0mod = FPAddStage0Mod(width, id_wid)
-        self.a0o = self.a0mod.ospec()
-
         self.a1mod = FPAddStage1Mod(width, id_wid)
         self.a1o = self.a1mod.ospec()
 
@@ -728,10 +727,12 @@ class FPAddAlignSingleAdd(FPState, FPID):
         self.mod.setup(m, i)
         m.d.comb += self.o.eq(self.mod.o)
 
-        self.a0mod.setup(m, self.o)
-        m.d.comb += self.a0o.eq(self.a0mod.o)
+        a0mod = FPAddStage0Mod(self.width, self.id_wid)
+        a0mod.setup(m, self.o)
+        a0o = a0mod.ospec()
+        m.d.comb += a0o.eq(a0mod.o)
 
-        self.a1mod.setup(m, self.a0o)
+        self.a1mod.setup(m, a0o)
 
         if self.in_mid is not None:
             m.d.comb += self.in_mid.eq(in_mid)