From: R Veera Kumar Date: Tue, 12 Jul 2022 14:04:07 +0000 (+0530) Subject: Update working and completed bugs X-Git-Tag: opf_rfc_ls005_v1~1211 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=1189696b2915bba432175aae9949a174960da4cc;p=libreriscv.git Update working and completed bugs --- diff --git a/veera.mdwn b/veera.mdwn index 8ae18aa01..cbb3a0587 100644 --- a/veera.mdwn +++ b/veera.mdwn @@ -8,22 +8,31 @@ Helping Core Hardware developers. ## Currently working on -### NLNet.2019.10.Formal +### NLNet.2019.10.032.Formal -* [Bug #838](https://bugs.libre-soc.org/show_bug.cgi?id=838): - sync or at least statically check fields.text, power_decoder, trans/svp64, CSVs between each other +* [Bug #883](https://bugs.libre-soc.org/show_bug.cgi?id=883): + add cvc5 and bitwuzla to hdl-yosys-tools + +## Currently deffered + + - Low performance bare minimum functionality SIMD emulator required + +## Completed but not yet submitted: + +### NLNet.2019.10.046.Standards * [Bug #839](https://bugs.libre-soc.org/show_bug.cgi?id=839): SVP64 / Extra-V / ZOLC whitepaper +### NLNet.2019.10.032.Formal + * [Bug #847](https://bugs.libre-soc.org/show_bug.cgi?id=847): dev\-env\-setup script for binutils-gdb for target powerpc64le\-linux\-gnu -## Currently deffered - - - Low performance bare minimum functionality SIMD emulator required +### NLNet.2019.10.043.Wishbone -## Completed but not yet submitted: +* [Bug #878](https://bugs.libre-soc.org/show_bug.cgi?id=878): + image conversion explaining multi-issue ## Submitted for NLNet RFP