From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Wed, 31 May 2023 14:35:36 +0000 (+0100)
Subject: rename EXTRA32 to EXTRA332 to represent what it is
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=1197ecb6b5110b180ef28c267982907acb1797c2;p=openpower-isa.git

rename EXTRA32 to EXTRA332 to represent what it is
---

diff --git a/src/openpower/decoder/power_enums.py b/src/openpower/decoder/power_enums.py
index 242b3a86..7f9eb3b2 100644
--- a/src/openpower/decoder/power_enums.py
+++ b/src/openpower/decoder/power_enums.py
@@ -210,12 +210,12 @@ class SVEType(Enum):
     """SVEType
     * EXTRA2 : 0: [10,11] 1: [12,13] 2: [14,15] 3: [16,17] unused: [18]
     * EXTRA3 : 0: [10,11,12] 1: [13,14,15] mask: [16,17,18] 
-    * EXTRA32: 0: [10,11,12] 1: [13,14,15] 2: [16,17] mask: [6,7,18]
+    * EXTRA332: 0: [10,11,12] 1: [13,14,15] 2: [16,17] mask: [6,7,18]
     """
     NONE = 0
     EXTRA2 = 1
     EXTRA3 = 2
-    EXTRA32 = 3 # mixed EXTRA3 and EXTRA2 using RM bits 6&7 for MASK_SRC
+    EXTRA332 = 3 # mixed EXTRA3 ECTRA3 EXTRA2 using RM bits 6&7 for MASK_SRC
 
     def __repr__(self):
         return self.name