From: Dave Brolley Date: Tue, 8 Dec 1998 18:22:25 +0000 (+0000) Subject: Tue Dec 8 13:16:53 1998 Dave Brolley X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=11a2d92065b46e50d2023434403cacb7cd0c2226;p=binutils-gdb.git Tue Dec 8 13:16:53 1998 Dave Brolley * sim/fr30/ldm0.cgs: New testcase. * sim/fr30/ldm1.cgs: New testcase. * sim/fr30/stm0.cgs: New testcase. * sim/fr30/stm1.cgs: New testcase. --- diff --git a/sim/testsuite/sim/fr30/ldm0.cgs b/sim/testsuite/sim/fr30/ldm0.cgs new file mode 100644 index 00000000000..9deb5642544 --- /dev/null +++ b/sim/testsuite/sim/fr30/ldm0.cgs @@ -0,0 +1,60 @@ +# fr30 testcase for ldm0 ($reglist_low) +# mach(): fr30 + + .include "testutils.inc" + + START + + .text + .global ldm0 +ldm0: + ; Test ldm0 ($reglist_low) + mvr_h_gr sp,r9 ; save stack pointer permanently + inci_h_gr -4,sp + mvi_h_mem 3,sp + inci_h_gr -4,sp + mvi_h_mem 2,sp + inci_h_gr -4,sp + mvi_h_mem 1,sp + inci_h_gr -4,sp + mvi_h_mem 0,sp + + set_cc 0x0f ; Condition codes should not change + ldm0 (r0,r2,r4,r6) + test_cc 1 1 1 1 + testr_h_gr sp,r9 + test_h_gr 0,r0 + test_h_gr 1,r2 + test_h_gr 2,r4 + test_h_gr 3,r6 + + inci_h_gr -16,sp + set_cc 0x0f ; Condition codes should not change + ldm0 (r1,r3,r5,r7) + test_cc 1 1 1 1 + testr_h_gr sp,r9 + test_h_gr 0,r1 + test_h_gr 1,r3 + test_h_gr 2,r5 + test_h_gr 3,r7 + + inci_h_gr -16,sp + set_cc 0x0f ; Condition codes should not change + ldm0 (r1,r5,r7,r3) ; Order speficied should not matter + test_cc 1 1 1 1 + testr_h_gr sp,r9 + test_h_gr 0,r1 + test_h_gr 1,r3 + test_h_gr 2,r5 + test_h_gr 3,r7 + + set_cc 0x0f ; Condition codes should not change + ldm0 () ; Nothing should happen + test_cc 1 1 1 1 + testr_h_gr sp,r9 + test_h_gr 0,r1 + test_h_gr 1,r3 + test_h_gr 2,r5 + test_h_gr 3,r7 + + pass diff --git a/sim/testsuite/sim/fr30/ldm1.cgs b/sim/testsuite/sim/fr30/ldm1.cgs new file mode 100644 index 00000000000..33cfcdba770 --- /dev/null +++ b/sim/testsuite/sim/fr30/ldm1.cgs @@ -0,0 +1,59 @@ +# fr30 testcase for ldm1 ($reglist_low) +# mach(): fr30 + + .include "testutils.inc" + + START + + .text + .global ldm1 +ldm1: + ; Test ldm1 ($reglist_low) + mvr_h_gr sp,r1 ; save stack pointer permanently + inci_h_gr -4,sp + mvi_h_mem 3,sp + inci_h_gr -4,sp + mvi_h_mem 2,sp + inci_h_gr -4,sp + mvi_h_mem 1,sp + inci_h_gr -4,sp + mvi_h_mem 0,sp + + set_cc 0x0f ; Condition codes should not change + ldm1 (r8,r10,r12,r14) + test_cc 1 1 1 1 + testr_h_gr sp,r1 + test_h_gr 0,r8 + test_h_gr 1,r10 + test_h_gr 2,r12 + test_h_gr 3,r14 + + inci_h_gr -16,sp + set_cc 0x0f ; Condition codes should not change + ldm1 (r9,r11,r13,r15) + test_cc 1 1 1 1 + test_h_gr 0,r9 + test_h_gr 1,r11 + test_h_gr 2,r13 + test_h_gr 3,r15 + + mvr_h_gr r1,sp ; restore stack pointer + inci_h_gr -16,sp + set_cc 0x0f ; Condition codes should not change + ldm1 (r9,r13,r15,r11); Order speficied should not matter + test_cc 1 1 1 1 + test_h_gr 0,r9 + test_h_gr 1,r11 + test_h_gr 2,r13 + test_h_gr 3,r15 + + mvr_h_gr r1,sp ; restore stack pointer + set_cc 0x0f ; Condition codes should not change + ldm1 () ; Nothing should happen + test_cc 1 1 1 1 + testr_h_gr sp,r1 + test_h_gr 0,r9 + test_h_gr 1,r11 + test_h_gr 2,r13 + + pass diff --git a/sim/testsuite/sim/fr30/stm0.cgs b/sim/testsuite/sim/fr30/stm0.cgs new file mode 100644 index 00000000000..5cc162c1a31 --- /dev/null +++ b/sim/testsuite/sim/fr30/stm0.cgs @@ -0,0 +1,101 @@ +# fr30 testcase for stm0 ($reglist_low) +# mach(): fr30 + + .include "testutils.inc" + + START + + .text + .global stm0 +stm0: + ; Test stm0 ($reglist_low) + mvr_h_gr sp,r8 ; save stack pointer temporarily + mvr_h_gr sp,r9 ; save stack pointer permanently + mvi_h_gr 0,r0 + mvi_h_gr 1,r1 + mvi_h_gr 2,r2 + mvi_h_gr 3,r3 + mvi_h_gr 4,r4 + mvi_h_gr 5,r5 + mvi_h_gr 6,r6 + mvi_h_gr 7,r7 + set_cc 0x0f ; Condition codes should not change + stm0 (r0,r2,r4,r6) + test_cc 1 1 1 1 + inci_h_gr -4,r8 + test_h_mem 6,r8 + inci_h_gr -4,r8 + test_h_mem 4,r8 + inci_h_gr -4,r8 + test_h_mem 2,r8 + inci_h_gr -4,r8 + test_h_mem 0,r8 + + mvr_h_gr r9,sp ; restore stack pointer + mvr_h_gr r9,r8 ; save stack pointer temporarily + mvi_h_gr 0,r0 + mvi_h_gr 1,r1 + mvi_h_gr 2,r2 + mvi_h_gr 3,r3 + mvi_h_gr 4,r4 + mvi_h_gr 5,r5 + mvi_h_gr 6,r6 + mvi_h_gr 7,r7 + set_cc 0x0f ; Condition codes should not change + stm0 (r1,r3,r5,r7) + test_cc 1 1 1 1 + inci_h_gr -4,r8 + test_h_mem 7,r8 + inci_h_gr -4,r8 + test_h_mem 5,r8 + inci_h_gr -4,r8 + test_h_mem 3,r8 + inci_h_gr -4,r8 + test_h_mem 1,r8 + + mvr_h_gr r9,sp ; restore stack pointer + mvr_h_gr r9,r8 ; save stack pointer temporarily + mvi_h_gr 0,r0 + mvi_h_gr 1,r1 + mvi_h_gr 2,r2 + mvi_h_gr 3,r3 + mvi_h_gr 4,r4 + mvi_h_gr 5,r5 + mvi_h_gr 6,r6 + mvi_h_gr 7,r7 + set_cc 0x0f ; Condition codes should not change + stm0 (r1,r5,r7,r3) ; Order specified should not matter + test_cc 1 1 1 1 + inci_h_gr -4,r8 + test_h_mem 7,r8 + inci_h_gr -4,r8 + test_h_mem 5,r8 + inci_h_gr -4,r8 + test_h_mem 3,r8 + inci_h_gr -4,r8 + test_h_mem 1,r8 + + mvr_h_gr r9,sp ; restore stack pointer + mvr_h_gr r9,r8 ; save stack pointer temporarily + mvi_h_gr 9,r0 + mvi_h_gr 9,r1 + mvi_h_gr 9,r2 + mvi_h_gr 9,r3 + mvi_h_gr 9,r4 + mvi_h_gr 9,r5 + mvi_h_gr 9,r6 + mvi_h_gr 9,r7 + set_cc 0x0f ; Condition codes should not change + stm0 () ; should do nothing + test_cc 1 1 1 1 + testr_h_gr r9,sp + inci_h_gr -4,r8 + test_h_mem 7,r8 + inci_h_gr -4,r8 + test_h_mem 5,r8 + inci_h_gr -4,r8 + test_h_mem 3,r8 + inci_h_gr -4,r8 + test_h_mem 1,r8 + + pass diff --git a/sim/testsuite/sim/fr30/stm1.cgs b/sim/testsuite/sim/fr30/stm1.cgs new file mode 100644 index 00000000000..2ac373d3544 --- /dev/null +++ b/sim/testsuite/sim/fr30/stm1.cgs @@ -0,0 +1,97 @@ +# fr30 testcase for stm1 ($reglist_low) +# mach(): fr30 + + .include "testutils.inc" + + START + + .text + .global stm1 +stm1: + ; Test stm1 ($reglist_low) + mvr_h_gr sp,r1 ; save stack pointer temporarily + mvr_h_gr sp,r2 ; save stack pointer permanently + mvi_h_gr 8,r8 + mvi_h_gr 9,r9 + mvi_h_gr 10,r10 + mvi_h_gr 11,r11 + mvi_h_gr 12,r12 + mvi_h_gr 13,r13 + mvi_h_gr 14,r14 + set_cc 0x0f ; Condition codes should not change + stm1 (r8,r10,r12,r14) + test_cc 1 1 1 1 + inci_h_gr -4,r1 + test_h_mem 14,r1 + inci_h_gr -4,r1 + test_h_mem 12,r1 + inci_h_gr -4,r1 + test_h_mem 10,r1 + inci_h_gr -4,r1 + testr_h_mem 8,r1 + + mvr_h_gr r2,sp ; restore stack pointer + mvr_h_gr r2,r1 ; save stack pointer temporarily + mvi_h_gr 8,r8 + mvi_h_gr 9,r9 + mvi_h_gr 10,r10 + mvi_h_gr 11,r11 + mvi_h_gr 12,r12 + mvi_h_gr 13,r13 + mvi_h_gr 14,r14 + set_cc 0x0f ; Condition codes should not change + stm1 (r9,r11,r13,r15) + test_cc 1 1 1 1 + inci_h_gr -4,r1 + testr_h_mem r2,r1 + inci_h_gr -4,r1 + test_h_mem 13,r1 + inci_h_gr -4,r1 + test_h_mem 11,r1 + inci_h_gr -4,r1 + test_h_mem 9,r1 ; saved r15 is from before stm1 + + mvr_h_gr r2,sp ; restore stack pointer + mvr_h_gr r2,r1 ; save stack pointer temporarily + mvi_h_gr 8,r8 + mvi_h_gr 9,r9 + mvi_h_gr 10,r10 + mvi_h_gr 11,r11 + mvi_h_gr 12,r12 + mvi_h_gr 13,r13 + mvi_h_gr 14,r14 + set_cc 0x0f ; Condition codes should not change + stm1 (r9,r13,r15,r11); Order specified should not matter + test_cc 1 1 1 1 + inci_h_gr -4,r1 + testr_h_mem r2,r1 + inci_h_gr -4,r1 + test_h_mem 13,r1 + inci_h_gr -4,r1 + test_h_mem 11,r1 + inci_h_gr -4,r1 + test_h_mem 9,r1 ; saved r15 is from before stm1 + + mvr_h_gr r2,sp ; restore stack pointer + mvr_h_gr r2,r1 ; save stack pointer temporarily + mvi_h_gr 9,r8 + mvi_h_gr 9,r9 + mvi_h_gr 9,r10 + mvi_h_gr 9,r11 + mvi_h_gr 9,r12 + mvi_h_gr 9,r13 + mvi_h_gr 9,r14 + set_cc 0x0f ; Condition codes should not change + stm1 () ; should do nothing + test_cc 1 1 1 1 + testr_h_gr r2,sp + inci_h_gr -4,r1 + testr_h_mem r2,r1 + inci_h_gr -4,r1 + test_h_mem 13,r1 + inci_h_gr -4,r1 + test_h_mem 11,r1 + inci_h_gr -4,r1 + test_h_mem 9,r1 + + pass