From: Tushar Krishna <Tushar.Krishna@amd.com>
Date: Wed, 21 Jul 2010 16:55:57 +0000 (-0700)
Subject: Fix x86 XCHG macro-op to use locked micro-ops for all memory accesses
X-Git-Tag: stable_2012_02_02~992
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=11bb678a8017bba31c69847ee87212579b6b2f02;p=gem5.git

Fix x86 XCHG macro-op to use locked micro-ops for all memory accesses
---

diff --git a/src/arch/x86/isa/insts/general_purpose/data_transfer/xchg.py b/src/arch/x86/isa/insts/general_purpose/data_transfer/xchg.py
index 03752c28a..6504b5ab4 100644
--- a/src/arch/x86/isa/insts/general_purpose/data_transfer/xchg.py
+++ b/src/arch/x86/isa/insts/general_purpose/data_transfer/xchg.py
@@ -50,31 +50,31 @@ def macroop XCHG_R_R
 
 def macroop XCHG_R_M
 {
-    ldst t1, seg, sib, disp
-    st reg, seg, sib, disp
+    ldstl t1, seg, sib, disp
+    stul reg, seg, sib, disp
     mov reg, reg, t1
 };
 
 def macroop XCHG_R_P
 {
     rdip t7
-    ldst t1, seg, riprel, disp
-    st reg, seg, riprel, disp
+    ldstl t1, seg, riprel, disp
+    stul reg, seg, riprel, disp
     mov reg, reg, t1
 };
 
 def macroop XCHG_M_R
 {
-    ldst t1, seg, sib, disp
-    st reg, seg, sib, disp
+    ldstl t1, seg, sib, disp
+    stul reg, seg, sib, disp
     mov reg, reg, t1
 };
 
 def macroop XCHG_P_R
 {
     rdip t7
-    ldst t1, seg, riprel, disp
-    st reg, seg, riprel, disp
+    ldstl t1, seg, riprel, disp
+    stul reg, seg, riprel, disp
     mov reg, reg, t1
 };