From: Segher Boessenkool <segher@kernel.crashing.org>
Date: Thu, 3 Nov 2016 16:04:22 +0000 (+0100)
Subject: combine lhs zero_extract fix (PR78186)
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=122e3608b6d4d31ebd68f12d55b44319d54486f9;p=gcc.git

combine lhs zero_extract fix (PR78186)


	PR rtl-optimization/78186
	* combine.c (change_zero_ext): Mask the RHS of a zero_extract as
	well, when converting to IOR.

From-SVN: r241824
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 920d870a38a..680b54947c2 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2016-11-03  Segher Boessenkool  <segher@kernel.crashing.org>
+
+	PR rtl-optimization/78186
+	* combine.c (change_zero_ext): Mask the RHS of a zero_extract as
+	well, when converting to IOR.
+
 2016-11-03  Eric Botcazou  <ebotcazou@adacore.com>
 
 	* config/sparc/sparc.md (vec_interleave_lowv8qi): Delete.
diff --git a/gcc/combine.c b/gcc/combine.c
index 6cbb8cfb23e..c605b1a7831 100644
--- a/gcc/combine.c
+++ b/gcc/combine.c
@@ -11190,6 +11190,9 @@ change_zero_ext (rtx pat)
       rtx x = gen_rtx_AND (mode, reg, immed_wide_int_const (mask, mode));
       rtx y = simplify_gen_binary (ASHIFT, mode, SET_SRC (pat),
 				   GEN_INT (offset));
+      wide_int mask2 = wi::shifted_mask (offset, width, false, reg_width);
+      y = simplify_gen_binary (AND, mode, y,
+			       immed_wide_int_const (mask2, mode));
       rtx z = simplify_gen_binary (IOR, mode, x, y);
       SUBST (SET_DEST (pat), reg);
       SUBST (SET_SRC (pat), z);