From: Marek Olšák <marek.olsak@amd.com>
Date: Thu, 19 May 2016 18:12:10 +0000 (+0200)
Subject: radeonsi: set correct stencil tile mode for texturing
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=12740efd29a4b17b721e4ca157ad3ae714c70842;p=mesa.git

radeonsi: set correct stencil tile mode for texturing

Sadly, this doesn't affect SI and VI in any way.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
---

diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c b/src/gallium/drivers/radeonsi/si_descriptors.c
index 6dcce3cdb08..71f4d713fce 100644
--- a/src/gallium/drivers/radeonsi/si_descriptors.c
+++ b/src/gallium/drivers/radeonsi/si_descriptors.c
@@ -342,12 +342,18 @@ static void si_set_sampler_view(struct si_context *sctx,
 		pipe_sampler_view_reference(&views->views[slot], view);
 		memcpy(desc, rview->state, 8*4);
 
-		if (view->texture && view->texture->target != PIPE_BUFFER)
+		if (view->texture && view->texture->target != PIPE_BUFFER) {
+			bool is_separate_stencil =
+				rtex->is_depth && !rtex->is_flushing_texture &&
+				rview->is_stencil_sampler;
+
 			si_set_mutable_tex_desc_fields(rtex,
 						       rview->base_level_info,
 						       rview->base_level,
 						       rview->block_width,
-						       false, desc);
+						       is_separate_stencil,
+						       desc);
+		}
 
 		if (view->texture && view->texture->target != PIPE_BUFFER &&
 		    rtex->fmask.size) {