From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Thu, 27 May 2021 13:59:36 +0000 (+0000)
Subject: set other nets to input in fake 4k SRAM cell
X-Git-Tag: LS180_RC3~37
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=128ddc019ac826996d7d279059d3563baca06cbc;p=soclayout.git

set other nets to input in fake 4k SRAM cell
---

diff --git a/experiments9/LibreSOCMem.py b/experiments9/LibreSOCMem.py
index 3bb757d..8489df4 100644
--- a/experiments9/LibreSOCMem.py
+++ b/experiments9/LibreSOCMem.py
@@ -251,9 +251,11 @@ def _load():
                 net.setExternal(True)
                 NetExternalComponents.setExternal(pin)
                 # q is an output, has to be explicitly set as output
-                # everything else can kinda get away with not being set
+                # everything else set to input
                 if name == 'q':
                     net.setDirection( Net.Direction.OUT )
+                else:
+                    net.setDirection( Net.Direction.IN )
             # separate the pin groups
             x += step * 3