From: Eric Christopher Date: Wed, 12 Jun 2002 23:26:44 +0000 (+0000) Subject: 2002-06-12 Eric Christopher X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=12bf26b6602a3365dee092f62bc4abe36df59957;p=gcc.git 2002-06-12 Eric Christopher From Chris Demetriou * config/mips/mips.h (ISA_HAS_FP4): Add ISA_MIPS64 and fix comment. (ISA_HAS_MADD_MSUB): Ditto. (ISA_HAS_NMADD_NMSUB): Ditto. From-SVN: r54569 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 4e7a821397b..79dd06e583e 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2002-06-12 Eric Christopher + + From Chris Demetriou + * config/mips/mips.h (ISA_HAS_FP4): Add ISA_MIPS64 and fix + comment. + (ISA_HAS_MADD_MSUB): Ditto. + (ISA_HAS_NMADD_NMSUB): Ditto. + 2002-06-12 Eric Christopher * config.gcc: Consolidate little endian handling and diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h index b68840f5e1b..7778361e859 100644 --- a/gcc/config/mips/mips.h +++ b/gcc/config/mips/mips.h @@ -751,22 +751,24 @@ extern void sbss_section PARAMS ((void)); || ISA_MIPS64) /* This is a catch all for the other new mips4 instructions: indexed load and - indexed prefetch instructions, the FP madd,msub,nmadd, and nmsub instructions, - and the FP recip and recip sqrt instructions */ -#define ISA_HAS_FP4 (ISA_MIPS4 \ + indexed prefetch instructions, the FP madd,msub,nmadd, and nmsub + instructions, and the FP recip and recip sqrt instructions */ +#define ISA_HAS_FP4 ((ISA_MIPS4 \ + || ISA_MIPS64) \ && !TARGET_MIPS16) /* ISA has conditional trap instructions. */ #define ISA_HAS_COND_TRAP (!ISA_MIPS1 \ && !TARGET_MIPS16) -/* ISA has multiply-accumulate instructions, madd and msub. */ +/* ISA has integer multiply-accumulate instructions, madd and msub. */ #define ISA_HAS_MADD_MSUB ((ISA_MIPS32 \ || ISA_MIPS64 \ ) && !TARGET_MIPS16) -/* ISA has nmadd and nmsub instructions. */ -#define ISA_HAS_NMADD_NMSUB (ISA_MIPS4 \ +/* ISA has floating-point nmadd and nmsub instructions. */ +#define ISA_HAS_NMADD_NMSUB ((ISA_MIPS4 \ + || ISA_MIPS64) \ && ! TARGET_MIPS16) /* ISA has count leading zeroes/ones instruction (not implemented). */