From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Mon, 2 Apr 2018 12:26:59 +0000 (+0100)
Subject: add B extension proposal
X-Git-Tag: convert-csv-opcode-to-binary~5757
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=13428318c524d9011d61716b42b11f804d79ea25;p=libreriscv.git

add B extension proposal
---

diff --git a/shakti/m_class.mdwn b/shakti/m_class.mdwn
index 71fea274d..ed3953b49 100644
--- a/shakti/m_class.mdwn
+++ b/shakti/m_class.mdwn
@@ -352,6 +352,6 @@ many more.
 * <http://n64devkit.square7.ch/qa/graphics/ucode.htm>
 * <https://dac.com/media-center/exhibitor-news/synopsys%E2%80%99-designware-universal-ddr-memory-controller-delivers-30-percent> 110nm DDR3 PHY
 * <https://bitbucket.org/cfelton/minnesota> myhdl HDL cores
-
+* B Extension proposal <https://groups.google.com/a/groups.riscv.org/forum/#!topic/isa-dev/zi_7B15kj6s>
 [[!tag cpus]]